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[Program doc] DDR_MMC_JEDEC

Description: 关于DDR，DDR2,DDR3和MMC的标准规范。-On the DDR, DDR2, DDR3 and the MMC standards.
Platform: | Size: 13941760 | Author: 崔海群 | Hits:

[VHDL-FPGA-Verilog] c_xapp851

Description: 这是xilinx应用指南xapp851的中文版本。本应用指南描述了在 Virtex™ -5 器件中实现的 200 MHz DDR SDRAM （JEDEC DDR400 (PC3200) 标准）控制器。本设计实现使用 IDELAY 单元调整读数据时序。读数据时序校准和调整在此控制器中完成。-This is the xilinx application note xapp851 the Chinese version. This application note describes the Virtex ™ -5 devices to achieve 200 MHz DDR SDRAM (JEDEC DDR400 (PC3200) standard) controller. The Design and Implementation of the use of IDELAY unit to adjust read data timing. Reading the data calibration and adjust the timing for completion of this controller.
Platform: | Size: 408576 | Author: 陈阳 | Hits:

[VHDL-FPGA-Verilog] JEDEC

Description: DDR SDRAM的JEDEC标准，对DDR SDRAM的编程学习者有帮助。-The JEDEC standards for DDR SDRAM, DDR SDRAM programming for learners help.
Platform: | Size: 840704 | Author: 李娟 | Hits:

[Software Engineering] JESD79-3E

Description: This document provides implementation instructions for the DDR3 interface-This document defines the DDR3 SDRAM specification, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this Specification is to define the minimum set of requirements for JEDEC compliant 512 Mb through 8 Gb for x4, x8, and x16 DDR3 SDRAM devices. This specification was created based on the DDR2 specification (JESD79-2) and some aspects of the DDR specification (JESD79). Each aspect of the changes for DDR3 SDRAM operation were considered and approved by committee ballot(s). The accumulation of these ballots were then incorporated to prepare this JESD79-3 specification, replacing whole sections and incorporating the changes into Functional Description and Operation.
Platform: | Size: 4283392 | Author: lei | Hits:

[Linux-Unix] jedec_ddr_data

Description: DDR addressing details and AC timing parameters from JEDEC specs.
Platform: | Size: 1024 | Author: qeilagui | Hits:

[Linux-Unix] jedec_ddr

Description: Definitions for DDR memories based on JEDEC specs.
Platform: | Size: 1024 | Author: jiumxvon | Hits:

[Linux-Unix] jedec_ddr_data

Description: DDR addressing details and AC timing parameters JEDEC specs. -DDR addressing details and AC timing parameters JEDEC specs.
Platform: | Size: 1024 | Author: kycongong | Hits:

[Linux-Unix] jedec_ddr

Description: Definitions for DDR memories based on JEDEC specs.
Platform: | Size: 1024 | Author: dongvpwer | Hits:

[Software Engineering] ddr2.pdf

Description: JEDEC DDR 2 memory interface specification document
Platform: | Size: 988160 | Author: mahatma | Hits:

[hardware design] JESD79-5 DDR5 Spec Early Draft Rev0.1.pdf

Description: JEDC DDR-5 Standard. DDR-5 标准。(JEDC DDR-5 Standard. JESD79-5 DDR5 Spec Early Draft Rev0.1)
Platform: | Size: 4538368 | Author: Vkings | Hits:

[] JESD79-4

Description: JEDEC DDR4 spec 标准，是学习DDR的好资料(JEDEC DDR4 spec, good spec for understanding and studying DDR4)
Platform: | Size: 3442688 | Author: 哎呀123456 | Hits:

[Technology Management] DDR4 JEDEC standard

Description: DDR4 SDRAM Specifications from JEDEC STANDARD. ball/signal assignments. The purpose of this Standard is to define the minimum set of requirements for JEDEC compliant 2 Gb through 16 Gb for x4, x8, and x16 DDR4 SDRAM devices. This standard was created based on the DDR3 standard (JESD79-3) and some aspects of the DDR and DDR2 standards (JESD79, JESD79-2).
Platform: | Size: 1824071 | Author: bdebug@gmail.com | Hits:

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