Search - lcd code in vhdl

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[VHDL-FPGA-Verilog] LCDVHDL DL : 0: LCD控制VHDL程序与仿真程序代码很有价值-LCD control procedures and simulation of VHDL code valuable
Update : 2025-02-17 Size : 4kb Publisher : 黄康
[VHDL-FPGA-Verilog] LCD1602 DL : 0: LCD1602显示源代码 1。源文件保存在src目录，QII的工程文件保存在Proj目录； 2。程序实现的功能是标准的16×2字符型液晶模块上显示字符串； 3-LCD1602 display the source code 1. Source file stored in the src directory, QII the project file stored in the directory Proj 2. Realize the function of the procedure is a standard 16 × 2 character LCD module to display the string 3
Update : 2025-02-17 Size : 700kb Publisher : 张海风
[Other] VGALCD DL : 0: lcd控制器的源程序，可以随便使用，免费试用。不多描述。-lcd controller source code, you can not use, free trial. Not much to describe.
Update : 2025-02-17 Size : 483kb Publisher : 刘源
[VHDL-FPGA-Verilog] UP3_CLOCK DL : 0: 在UP3开发板上已经验证过的VHDL代码。精确到十分之一秒，具有闹钟，整点报时，时间可重新设置等功能，在LCD1602上显示。绝对推荐，比网上其他类似代码功能要全而且经过验证。-In the UP3 development board has been verified VHDL code. Accurate to one-tenth of seconds, with the alarm clock, the whole point timekeeping, time and other functions can be re-instated in the LCD1602 display. Absolutely recommended online than other similar features to the entire code and verified.
Update : 2025-02-17 Size : 711kb Publisher : kehan
[VHDL-FPGA-Verilog] lcd12864 DL : 0: LCD12864 在Spartan-3E实现教程和代码-LCD12864 in the Spartan-3E achieve tutorials and code
Update : 2025-02-17 Size : 981kb Publisher : hushengquan
[VHDL-FPGA-Verilog] tft_cntlr_ref_v1_00_c DL : 0: TFT LCD 控制器的VERILOG 源代码程序,已在某项目上成功应用.-TFT LCD controller VERILOG source code procedures have been in a successful application projects.
Update : 2025-02-17 Size : 15kb Publisher : liubing
[VHDL-FPGA-Verilog] lcd240128_ok DL : 0: 基于VHDL的1602显示程序,包含完整的源代码,锁脚文件以及下载文件,可直接下载使用-VHDL-based display program in 1602, contains the complete source code, locking pin, as well as download files documents can be directly downloaded using
Update : 2025-02-17 Size : 775kb Publisher : 陈泽涛
[SCM] ps2_lcd DL : 0: 1、ps/2键盘输入，通过led显示ascii码 2、稍等1s可以在lcd上显示输入的字符 3、其中键盘上的backspce键是用来清屏的 4、当lcd上显示满字符时，在按下按键自动清屏，从第一行显示。-1, ps/2 keyboard input, through the led display ascii code 2, wait 1s in the lcd display characters input 3, which backspce keys on the keyboard was required to settle the screen 4, when the lcd display full of characters, the press the button automatically Qing-ping, from the first line of display.
Update : 2025-02-17 Size : 9kb Publisher : yuan
[SCM] 1602LCD DL : 0: 用EPM1270实现的1602液晶驱动Verilog-EPM1270 achieved by 1602 LCD driver Verilog
Update : 2025-02-17 Size : 289kb Publisher : cx
[VHDL-FPGA-Verilog] Spartan3E DL : 0: Spartan3E的LCD字符滚动显示源程序，具体内容见注释-Scroll Spartan3E character LCD display the source code, see the specific contents of the Notes
Update : 2025-02-17 Size : 404kb Publisher : xwy
[Other] 23 DL : 0: 基于FPGA的液晶显示控制器的设计，FPGA用的是EP2C5,LCD用的是ST7920内核的122*32点阵的LCD，显示中西文字符-FPGA-based LCD display controller design, FPGA is used EP2C5, LCD is used in the ST7920 core of 122* 32 dot matrix LCD, display of Chinese and Western characters
Update : 2025-02-17 Size : 2.21mb Publisher : 龙霄
[DSP program] ch5 DL : 0: 如何以DSP讀取鍵盤輸入 ASC2碼且將輸入的值是在LCD上-How to read keyboard input in DSP code ASC2 and the value of the input on the LCD
Update : 2025-02-17 Size : 824kb Publisher : 123
[VHDL-FPGA-Verilog] LCD_Top DL : 0: FPGA 的verilog LCD显示代码-FPGA code in verilog LCD display
Update : 2025-02-17 Size : 3kb Publisher : xcxscf
[Technology Management] dds9851 DL : 0: 本文主要介绍的是采用直接数字频率合成的短波信号发生器，它主要以微电脑控制部分、直接数字频率合成（DDS）部分、数字锁相环频率合成部分、背光液晶显示部分、功率放大部分等组成。该软件系统采用菜单形式进行操作，操作方便明了，增加了很多功能。它通过启动DDS后，把内存缓存区的数据送到DDS后输出相应的频率，并把数据转换为BCD码，送到液晶显示器进行显示。该系统输出稳定度、精度极高，适用于当代的尖端的通信系统和精密的高精度仪器。-This paper describes the use of direct digital frequency synthesis of short-wave signal generator, which is part of a micro-computer control, Direct Digital Synthesis (DDS) of the digital part of PLL frequency synthesizer, backlit liquid crystal display of the power amplifier, etc. composition. The menu system uses the form of software to operate, easy to operate and clear, increase in the number of features. DDS through start after the memory cache after the data to the DDS output corresponding frequency, and the data is converted to BCD code to the LCD display. The output of the system stability, high precision for cutting-edge contemporary and sophisticated communication systems high-precision instruments
Update : 2025-02-17 Size : 456kb Publisher : xiang
[VHDL-FPGA-Verilog] lab3 DL : 0: VHDL code for using LCD in an fpga project
Update : 2025-02-17 Size : 45kb Publisher : Sara
[VHDL-FPGA-Verilog] vga-connector_files DL : 0: vhdl code for using lcd in an fpga project
Update : 2025-02-17 Size : 224kb Publisher : Sara
[VHDL-FPGA-Verilog] lcdok DL : 0: 自己写的LCD控制器，在EP1C3T140C8上跑过，对初学者有帮助，实在的VHDL代码-Write your own LCD controller, in the EP1C3T140C8 last ran for help for beginners, it' s VHDL code
Update : 2025-02-17 Size : 722kb Publisher : 陈俊
[VHDL-FPGA-Verilog] lcd_1602 DL : 0: 该代码是用VHDL语言写的，用来控制LCD1602液晶显示器，功能正确。-The code is written in VHDL language to control the LCD1602 LCD display, function correctly.
Update : 2025-02-17 Size : 5kb Publisher : 王伟
[VHDL-FPGA-Verilog] LCD12864 DL : 0: 1 fpga驱动lcd液晶12864的verilog源程序 (显示英文，可以在源程序中直接修改成自己想要显示的英文) 2 引脚配置完成，程序已经测试，完全好用 3 使用的FPGA芯片是altera的max2EP2C5T1-1 fpga driver' s verilog source code 12864 lcd LCD (display in English, you can directly modify the source program into what you want displayed in English) 2-pin configuration is completed, the program has been tested, completely easy to use 3 FPGA chip is used in the altera max2EP2C5T144
Update : 2025-02-17 Size : 605kb Publisher : pomao
[VHDL-FPGA-Verilog] S3DSP_PS2_LCD_TEST DL : 0: FPGA LCD test code in VHDL.
Update : 2025-02-17 Size : 805kb Publisher : priya

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