Description: ldpc码原理与应用 文红 电子科技大
电子版 全文 与大家共享-Principle and Practical LDPC Code Red Electronics Science and Technology The full text of the electronic version to share with everyone Platform: |
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Description: 低密度奇偶校验码的VHDL程序，用于LDPC码的硬件实现-LDPC code VHDL program for the LDPC code of hardware implementation Platform: |
Size: 2048 |
Author:赵天婵 |
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Description: 802.3an ldpc码编码、译码设计，使用VERILOG hdl语言编写，包括测试代码，-802.3an ldpc code encoding, decoding the design, use of language VERILOG hdl, including test code, Platform: |
Size: 788480 |
Author:聂样 |
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Description: stanford开发的LDPCA（LDPC码的改进）的编码器和解码器，以及几个码字。-stanford development LDPCA (LDPC codes to improve) the encoder and decoder, as well as several code words. Platform: |
Size: 6643712 |
Author:algernon |
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Description: LDPC 编码的Verilog源代码，我没有验证，不知道效果如何，与大家分享，供大家参考。-LDPC-coded Verilog source code, I did not verify, I do not know how to share with you, for your reference. Platform: |
Size: 622592 |
Author:peter |
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Description: 最近在做毕设，ldpc码的编解码实现，这个是verilog实现。-Recently completed the set up to do, ldpc code codec implementation, this is the Verilog implementation. Platform: |
Size: 9216 |
Author:fly |
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Description: LDPC码在基于BP (Belief Propagation) 的迭代译码相结合的条件下具有逼近Shannon 限的性能，是继turbo 码后在纠错编码领域又一重大进展。压缩文件中给出了LDPC在高斯信道下的c程序。-LDPC codes based on BP (Belief Propagation) Iterative Decoding of combining conditions with performance approaching Shannon limit on the heels of turbo code error correction coding in another area of significant progress. Compressed file give the LDPC at Gaussian channel c under the procedure. Platform: |
Size: 7168 |
Author:aiguixia |
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Description: 低密度奇偶校验码(简称LDPC码)是目前距离香农限最近的一种线性纠错码，它的直接编码运算量较大，通常具有码长的二次方复杂度．为此，利用有效的校验矩阵，来降低编码的复杂度，同时研究利用大规模集成电路实现LDPC码的编码．在ISE 8．2软件平台上采用基于FPGA的Verilog HDL语言实现了有效的编码过程，为LDPC码的硬件实现和实际应用提供了依据-Abstract：Low．density parity·check code(LDPC code)is a kind of linear eror·correcting code nearest to Shannon Limit．For LDPC
cod e，the computational overhead for direct encoding operations is large，as the complexity of encod ing is the square of the length of
codeword．Hence，this paper reduces the complexity of coding by using effective parity—check matrix，and realizes the encoding device
for LDPC code by use of large·scale integrated circuits．The effective encoding process based on FPGA with Verilog HDL language is
implemented on ISE 8．2 software platform ，providing a feasible basis for hardware implementation an d practical application of LDPC
code． Platform: |
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Author:秦小星 |
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Description: ldpc译码算法介绍及fpga verilog系统方案设计，包括log_bp算法、min_sum算法、scaling_min_sum算法等-introducing the ldpc code decoding algorithm and the related system design，including the log_bp,the min_sum and the scaling_min_sum Platform: |
Size: 81920 |
Author:类春阳 |
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Description: 深空通信中AR4JA码编码的研究与实现，ＡＲ４ＪＡ码是ＬＤＰＣ码的一种，文件中是Ｖｅｒｉｌｏｇ语言的硬件实现。-Research and Implementation of the Deep Space Communications AR4JA coding, AR4JA code LDPC codes a hardware implementation of the Verilog language file. Platform: |
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Author:liangliang |
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