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[Communication] 伪随机序列

Description: 线形反馈移位寄存器（LFSR)是数字系统中一个重要的结构，本程序可以自动产生AHDL,VHDL,Verilog的源代码及电路原理图。程序可以运行在win98/2000/NT平台-linear feedback shift register (LFSR) digital system is an important structure, the process can be automatically generated AHDL, VHDL, Verilog source code and circuit schematics. Procedures can run on platforms win98/2000/NT
Platform: | Size: 163107 | Author: 夏沫 | Hits:

[Communication] 伪随机序列

Description: 线形反馈移位寄存器（LFSR)是数字系统中一个重要的结构，本程序可以自动产生AHDL,VHDL,Verilog的源代码及电路原理图。程序可以运行在win98/2000/NT平台-linear feedback shift register (LFSR) digital system is an important structure, the process can be automatically generated AHDL, VHDL, Verilog source code and circuit schematics. Procedures can run on platforms win98/2000/NT
Platform: | Size: 162816 | Author: 夏沫 | Hits:

[VHDL-FPGA-Verilog] LFSR

Description: 自动生成线形反馈移位寄存器的各种HDL源代码和原理图的工具-Automatic generation of linear feedback shift register of a variety of HDL source code and schematic tools
Platform: | Size: 162816 | Author: zx | Hits:

[VHDL-FPGA-Verilog] rng

Description: verilog编写随机数产生源程序，在硬件电路设计中应用广泛。本程序是在LFSR and a CASR 基础上实现的-random number generator to prepare Verilog source code, in the hardware circuit design applications. This procedure is in the LFSR and a CASR based on the
Platform: | Size: 94208 | Author: Alex | Hits:

[Crack Hack] lfsr

Description: 伪随机序列产生器－线性反馈移位寄存器，Verilog HDL 原代码。-Pseudo-random sequence generator- linear feedback shift register, Verilog HDL source code.
Platform: | Size: 1024 | Author: 李辛 | Hits:

[VHDL-FPGA-Verilog] profiles

Description: source code of counter,ram,lfsr etc
Platform: | Size: 2048 | Author: narsimha | Hits:

[Other] lfsr.v.tar

Description: linear feedback shift register for generator in verilog code for random sequence generation.
Platform: | Size: 2048 | Author: balu | Hits:

[VHDL-FPGA-Verilog] lfsr

Description: 此实验介绍了伪随机序列的产生原理，并用verilog语言将其编码实现，有详细的代码备注-This experiment introduces the principle of pseudo-random sequence and its encoded with the verilog language implementation, a detailed code Notes
Platform: | Size: 76800 | Author: 飞扬奇迹 | Hits:

[VHDL-FPGA-Verilog] lfsr

Description: linear feedback shift register verilog code
Platform: | Size: 4096 | Author: zcos123 | Hits:

[VHDL-FPGA-Verilog] LFSR

Description: Verilog code for an 8-bit LFSR
Platform: | Size: 1024 | Author: baboy | Hits:

[IOS] pseudo

Description: VERILOG CODE FOR LFSR
Platform: | Size: 424960 | Author: LOGA | Hits:

[ERP-EIP-OA-Portal] LFSRTestbench

Description: java applet for dveleoping verilog code for lfsr
Platform: | Size: 198656 | Author: Shajin | Hits:

[VHDL-FPGA-Verilog] lab2B(4)LFSR

Description: 实现4位二进制随机数的产生的verilog代码(Implementation of generation random 4 bits code in verilog)
Platform: | Size: 1024 | Author: 电聪骑风 | Hits:

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