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[Special Effects] loopFilter

Description: 在H.264标准中，要求视频图像处理中环路滤波的C程序-the H.264 standard, called Video Image Processing loop filter C Program
Platform: | Size: 5120 | Author: 张殿凯 | Hits:

[Program doc] PLL_PLV

Description: 锁相回路可视为一个输出相位和输入相位的回授系统用以同步输入参考讯号和回授后输出信号。并让其操作同样的频率。如(图一)所示，简单锁相回路[3,4]是由三个电路构成，分别为相位侦测器（Phase Detector）、回路滤波器（Loop Filter）、压控荡器（VCO）-phase-locked loop can be regarded as a phase output and input phase feedback system for synchronous reference input and feedback signals After the output signal. And allowed to operate the same frequency. If (Figure 1), the simple lock-loop [3,4] by the three circuit. for the detection phase (Phase Detector), loop filter (Loop Filter), VCO finishes (VCO)
Platform: | Size: 149504 | Author: 王浩 | Hits:

[Embeded-SCM Develop] pll

Description: 该程序实现的锁相环，运行环境为matlab，二阶的环路滤波器-The program realization of phase-locked loop, operating environment for matlab, the second-order loop filter
Platform: | Size: 1024 | Author: change | Hits:

[VHDL-FPGA-Verilog] DIGTAL_FIR

Description: 环路滤波器的设计，基于FPGA的锁相环应用。-Loop filter design, FPGA-based PLL applications.
Platform: | Size: 774144 | Author: 梁大法 | Hits:

[matlab] pll-linear

Description: 该程序描述了二阶锁相环的环路滤波器的设计和线性模型分析-The program describes the second-order PLL loop filter design and linear model analysis
Platform: | Size: 1024 | Author: vie | Hits:

[AI-NN-PR] Designintelligentcarriertrackingloopbasedonsoftwar

Description: 在软件接收机的基础上,利用鉴频器辅助鉴相器的输出,引入一个模糊逻辑控制器,使得环路能够智能跟踪信号的动态变化.实验结果证明所提出的设计方法与传统环路相比可大幅度缩短跟踪时间,减小环路滤波器带宽,并能消除周跳.-In the software receiver, based on the use of auxiliary frequency discriminator phase detector output, the introduction of a fuzzy logic controller, the loop can be intelligent tracking signal dynamics. The experimental results demonstrate that the proposed design method with the traditional loop phase than we might have to significantly reduce the tracking time, reduce the loop filter bandwidth, and can eliminate the cycle slips.
Platform: | Size: 344064 | Author: 何宁 | Hits:

[VHDL-FPGA-Verilog] phase-locked

Description: 主要是关于锁相环的环路滤波设计与计算，非常经典的-Mainly on the phase-locked loop filter design and calculation, very classic
Platform: | Size: 1538048 | Author: 123 | Hits:

[Other] ChargePumpPLL

Description: An Analysis and Performance Evaluation of a Passive Filter Design Technique for Charge Pump PLL.pdf This paper investigates the design of passive loop filters for Frequency Synthesizers utilizing a Phase- Frequency Detector and a current switch charge pump.-An Analysis and Performance Evaluation of a Passive Filter Design Technique for Charge Pump PLL.pdf This paper investigates the design of passive loop filters for Frequency Synthesizers utilizing a Phase-Frequency Detector and a current switch charge pump.
Platform: | Size: 129024 | Author: 刘洋 | Hits:

[Communication-Mobile] costas_loop

Description: costas环载波同步与解调，其中有环路滤波器系数估算-costas loop carrier synchronization and demodulation, including the loop filter coefficients estimation
Platform: | Size: 2048 | Author: 王永俊 | Hits:

[Other] RRCfilter

Description: 在谱相关分析的基础上，文章研究了对一类特殊的非平 稳信号-循环平稳信号的最佳滤波问题.研究表明，针对循环 相关函数的最佳滤波器具有类似传统匹配滤波的结构-In the spectral correlation based on the analysis, the article studied pairs of a special class of non-stationary signals- the best cyclostationary signal filter problem. Studies have shown that the best correlation function for the loop filter has a structure similar to conventional matched filter
Platform: | Size: 155648 | Author: zhangsheng | Hits:

[Other] loop-gainKalmanfiltersourcecodepackage

Description: 自己编写的一个循环增益卡尔曼滤波程序包，用于对机动目标进行检测和跟踪的滤波算法，给出目标数学模型和噪声模型，仿真后给出平均观测误差。程序里相应位置有标有注释。供做雷达机动目标检测和跟踪方面研究的人员参考。-I have written a loop-gain Kalman filter package, used for maneuvering target detection and tracking of the filter algorithm, given objective mathematical model and noise model of simulation, the average observation error is given. Procedures in place are marked with the corresponding notes. Do radar for maneuvering target detection and tracking studies for reference.
Platform: | Size: 12288 | Author: 王宗鑫 | Hits:

[matlab] QPSKdigitalreceiver

Description: QPSK全数字接收机PDF，详细介绍了QPSK全数字接收机的构成，环路滤波器、内插器、Gardner定时恢复等部分的详细设计-QPSK digital receiver PDF, details of the composition of QPSK digital receiver, loop filter, interpolator, Gardner Timing Recovery and other parts of the detailed design
Platform: | Size: 442368 | Author: 周玉佳 | Hits:

[File Format] digital_pll

Description: 传统的数字锁相环系统是希望通过采用具有低通特性的环路滤波器，获得稳定的振荡控制数据由于数字电子技术的迅速发展，尤其是数字计算和信号处理技术在多媒体、自动化、仪器仪表、通讯等领域的广泛应用，用数字电路处理模拟信号的情况日益普遍。所以模拟信号数字化是信息技术的发展趋势，而数字锁相环在其中扮演着重要角色。-Conventional digital PLL system is to have a low-pass characteristics by using the loop filter to obtain a stable oscillation control data as the rapid development of digital electronic technology, especially digital computing and signal processing technology in the multimedia, automation, instrumentation , communications, the extensive application of digital circuits with analog signal processing is becoming more common. So analog signal digital information technology, trends, and digital phase locked loop in which play an important role.
Platform: | Size: 291840 | Author: 刘强为 | Hits:

[VHDL-FPGA-Verilog] code

Description: it is the collection of the modules involved inthe design of digital fm.the code coves the key components like numerically controlled oscillator, loop filter, fir filter ,phase detector along with the complete cicuit implementation of the digital fm and the test bench of it.
Platform: | Size: 5120 | Author: syamprasad | Hits:

[VHDL-FPGA-Verilog] dpll

Description: 基于Verilog的数字锁相环。包括三个模块，数字鉴相器DPD、数字环路滤波器DLF、数控振荡器 DCO三部分构成-Verilog-based digital PLL. Consists of three modules, the digital phase detector DPD, digital loop filter DLF, digitally controlled oscillator DCO three parts
Platform: | Size: 668672 | Author: 栾帅 | Hits:

[VHDL-FPGA-Verilog] FIR-LOOP-

Description: 数字接收机中的FIR滤波器，环形滤波器设计参考,VHDL代码-the FIR filter， loop filter design in a digital receiver,vhdl code
Platform: | Size: 1024 | Author: rickdecent | Hits:

[VHDL-FPGA-Verilog] loop

Description: loop filter IIR for pll Fm demodulator
Platform: | Size: 1024 | Author: bob | Hits:

[VHDL-FPGA-Verilog] Filter

Description: 该代码主要实现环路滤波器矩阵的设计，环路滤波器的功能主要是在鉴相器的输出端衰减高频误差分量，以提高抗干扰性能；在环路跳出锁定状态时，提高环路以短期存储，并迅速恢复信号。-The code mainly realizes the design of loop filter matrix, Loop filter function is mainly in the output of the phase discriminator attenuation of high frequency error component, in order to improve the anti-jamming ability In loop lock state, improve the loop with short-term storage, and quickly return signal.
Platform: | Size: 1024 | Author: HQ | Hits:

[Software Engineering] The-H.264-loop-filter

Description: H.264 loop filtering tutorial in english
Platform: | Size: 270336 | Author: iida | Hits:

[Other] Loop-filter-MB1504

Description: 环路滤波器参数设计软件，有效支撑锁相环系统-Loop filter parameters design software，Effectively support the phase-locked loop system
Platform: | Size: 29696 | Author: 孙科 | Hits:
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