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LPC总线从设备的verilog设计,包含状态机和中断功能。-verilog code for LPC device
Update : 2025-02-17 Size : 5kb Publisher : 饶进平

这是本人设计的一个关于VME总线接口的FGPA程序,FPGA一边连接ARM LPC2294,一边连接VME总线,FPGA采用的XILINX公司的SPARTANII系列,程序包包含完整的工程文件-This is my design of a VME bus interface on the FGPA procedures, FPGA side of the connection ARM LPC2294, while connecting VME bus, FPGA using the XILINX Inc. SPARTANII series, the package contains a complete project file
Update : 2025-02-17 Size : 2.56mb Publisher : zhangsongbai

LPC接口的VHDL语言实现,可以用于TPM的开发,以及基于FPGA的设计-LPC interface language realization of VHDL, can be used for the development of the TPM, as well as the design based on FPGA
Update : 2025-02-17 Size : 2kb Publisher : jack

FPGA实现LPC总线读的动能,Verilog语言-FPGA implementation of the kinetic energy of the LPC bus read, Verilog language
Update : 2025-02-17 Size : 963kb Publisher : 路永轲

基于PCI总线和LPC接口的POST主板诊断卡代码,已经通过fpga测试可以使用,性能非常稳定。-Based on the PCI bus and LPC POST motherboard diagnostic card code to interface fpga has passed the test can be used, the performance is very stable.
Update : 2025-02-17 Size : 734kb Publisher : wanglong

DL : 0
第二章 设计思路 2.1 设计总体框图 有分析可知,本次课程设计可以分成五个木块来实现相应的功能,分别是输入模块,计算模块,扫描模块,输出模块以及显示模块。((Calculator design based on FPGA DE2 development board. language use Verilog. Matrix keyboard input, LCD1602 display. Program includes key scanning module and LCD module and data process module, etc.)alculator\db\calculator.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd calculator\db\calculator.cycloneive_io_sim_cache.45um_ii_1200mv_0c_slow.hsd calculator\db\calculator.cycloneive_io_sim_cache.45um_ii_1200mv_85c_slow.hsd calculator\db\calculator.db_info calculator\db\calculator.fit.qmsg calculator\db\calculator.hier_info calculator\db\calculator.hif calculator\db\calculator.ipinfo calculator\db\calculator.lpc.html)
Update : 2025-02-17 Size : 1kb Publisher : fsfsfsfs
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