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VisualC++6.0从入门到精通－（全版）电子书6_0.rar
VisualC++6.0从入门到精通－（全版）电子书6_1.rar
VisualC++6.0从入门到精通－（全版）电子书6_2.rar
VisualC++6.0从入门到精通－（全版）电子书6_3.rar
VisualC++6.0从入门到精通－（全版）电子书6_4.rar
VisualC++6.0从入门到精通－（全版）电子书6_5.rar-Sub-directory of the book: VisualC++ 6.0 from entry to the master- (full version) e-book 6_0.rarVisualC++ 6.0 from entry to the master- (full version) e-book 6_1.rarVisualC++ 6.0 from entry to the master- (full version) e-book 6_2.rarVisualC++ 6.0 from entry to the master- (full version) e-book 6_3.rarVisualC++ 6.0 from entry to the master- (full version) e-book 6_4.rarVisualC++ 6.0 from entry to the master- (full version) e-book 6_5.rar
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Size: 368640 |
Author: zhangchao |
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Description: 一种实现载波监听多点接入／冲突检测的多主RS485总线-A carrier sense realize multi-point access/Collision Detection RS485 multi-master bus
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Size: 118784 |
Author: frankwu |
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Description: // -*- Mode: Verilog -*-
// Filename : wb_master.v
// Description : Wishbone Master Behavorial
// Author : Winefred Washington
// Created On : 2002 12 24
// Last Modified By: .
// Last Modified On: .
// Update Count : 0
// Status : Unknown, Use with caution!
// Description Specification
// General Description: 8, 16, 32-bit WISHBONE Master
// Supported cycles: MASTER, READ/WRITE
// MASTER, BLOCK READ/WRITE
// MASTER, RMW
// Data port, size: 8, 16, 32-bit
// Data port, granularity 8-bit
// Data port, Max. operand size 32-bit
// Data transfer ordering: little endian
// Data transfer sequencing: undefined-//-*- Mode: Verilog-*-
// Filename : wb_master.v
// Description : Wishbone Master Behavorial
// Author : Winefred Washington
// Created On : 2002 12 24
// Last Modified By: .
// Last Modified On: .
// Update Count : 0
// Status : Unknown, Use with caution!
// Description Specification
// General Description: 8, 16, 32-bit WISHBONE Master
// Supported cycles: MASTER, READ/WRITE
// MASTER, BLOCK READ/WRITE
// MASTER, RMW
// Data port, size: 8, 16, 32-bit
// Data port, granularity 8-bit
// Data port, Max. operand size 32-bit
// Data transfer ordering: little endian
// Data transfer sequencing: undefined
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Size: 8192 |
Author: 姓名 |
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Description: The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control
and data transfer communication between ICs.
Some of the features of the I2C bus are:
• Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A
12V supply line (500mA max.) for powering the peripherals often may be present.
• Each device connected to the bus is software addressable by a unique address and simple
master/ slave relationships exist at all times masters can operate as master-transmitters or as
master-receivers.
• The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data
corruption if two or more masters simultaneously initiate data transfer systems.
• Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard
mode or up to 400 KBit/s in the fast mode.
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Size: 788480 |
Author: lu |
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Description: Design of 915MHz RFID Reader
915MHz RFID读卡器设计----硕士学位论文-Design of 915MHz RFID Reader915MHz RFID reader design---- a master s degree thesis
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Size: 3078144 |
Author: woo |
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Description: 多点烟雾,温度探测报警程序
基于MSP430F247,485总线.-More smoke and temperature detection alarm procedures based on the MSP430F247, 485 bus.
Platform: |
Size: 94208 |
Author: saind |
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Description: 关于智能天线的硕士论文，有matlab仿真方案，可以好好研读。-Smart antenna on the master s thesis, a matlab simulation program, you can make good reading.
Platform: |
Size: 2729984 |
Author: 王红英 |
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Description: SPI Master Core Specification，This document provides specifications for the SPI (Serial Peripheral Interface) Master core-SPI Master Core Specification, This document provides specifications for the SPI (Serial Peripheral Interface) Master core
Platform: |
Size: 82944 |
Author: 贾远鸿 |
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Description: iic总线控制器VHDL实现
-- VHDL Source Files:
i2c.vhd -- top level file
i2c_control.vhd -- control function for the I2C master/slave
shift.vhd -- shift register
uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC
upcnt4.vhd -- 4-bit up counter
i2c_timesim.vhd -- post-route I2C simulation netlist
-IIC bus controller VHDL realize- VHDL Source Files: i2c.vhd- top level file i2c_control.vhd- control function for the I2C master/slave shift.vhd- shift register uc_interface.vhd- uC interface function for an 8-bit 68000-like uC upcnt4.vhd- 4-bit up counter i2c_timesim.vhd- post-route I2C simulation netlist
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Size: 889856 |
Author: benny |
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Description: PROFIBUS-dp PROGRAMS 主从站源程序 -PROFIBUS-dp PROGRAMS source master and slave stations
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Size: 763904 |
Author: 朱卫兵 |
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Description: profibus Master Slave PROGRAMS
profibus Master Slave PROGRAMS
Platform: |
Size: 56320 |
Author: ZHUWEIBING |
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Description:
MICROCHIP 實現I2C的 Master 端 (Firmware) 及 Slave 端 (Hardware) 相對應的程式範例
-err
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Size: 4096 |
Author: 陳嘉年 |
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Description: PIC18F458单片机主从机功能,ModBus通讯，三按键+12864LCD显示菜单-PIC18F458 Single-chip master-slave machine function, ModBus communication, three key+ 12864LCD show menu
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Size: 12288 |
Author: 缘临 |
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Description:
基于freescale MC9S12XF512 MCU，芯片自带Flexray通信控制器。可实现高达10Mb/s的Flxray通信.本程序主要功能：
1) 500ms实时中断。
2) SPI MASTER 运行于500kHz。
3) Flexray 总线以1.25Mbit/s 通信。-Based on freescale MC9S12XF512 MCU, chip communications controller Flexray own. Can achieve up to 10Mb/s communication of Flxray. This procedure main functions: 1) 500ms real-time interrupt. 2) SPI MASTER running on 500kHz. 3) Flexray bus to 1.25Mbit/s communications.
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Size: 798720 |
Author: 阿昆 |
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Description: 用VB实现的MODBUS主机程序，可以用来测试用单片机开发的从机，主从通讯。-VB achieved using MODBUS host procedures, can be used to test single-chip development from the machine, master-slave communication.
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Size: 18432 |
Author: 苏宏良 |
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Description: PB开发的一个山庄管理系统，现在仍在使用中，数据库sql server 2000。具有餐饮管理和住宿管理，含会员，折扣，支持读卡器等。13944902227-PB Hill developed a management system, are still in use, database sql server 2000. With food and beverage management and accommodation management, including members, discounts, etc. to support the reader. 13944902227
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Size: 3968000 |
Author: 柳彦春 |
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Description: 该程序是pic单片机程序，里面含有主从单片机i2c通讯程序。开发环境就是pic单片机的那个专用开发环境。单片机c程序，仅供大家参考。-The program is pic Singlechip procedure, which contains a single-chip i2c master-slave communication procedures. Development environment that is dedicated pic SCM development environment. Singlechip c procedures for your reference.
Platform: |
Size: 211968 |
Author: 刘柱 |
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Description: 基于FPGA的I2C总线主控器的设计与实现-Based on the I2C bus master FPGA Design and Implementation
Platform: |
Size: 1024 |
Author: wang |
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Description: delphi6从入门到精通随书源码，虽然我有多年Delphi编程经验，从新做一遍这些DEMO，仍收获很多。-Delphi6 from entry to the source well versed with the book, although I have many years of Delphi programming experience, so again these new DEMO, still has learned a lot.
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Size: 4673536 |
Author: 朱滨 |
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Description: 用verilog HDL实现I2C Master Controller 的设计，包括主程序设计和测试程序设计-Verilog HDL using I2C Master Controller to achieve the design, including the main program design and test program design
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Size: 211968 |
Author: zbs |
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