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Description: 基于RMI1250（MIPS 32内核）通过GPIO模拟IIC驱动源码，在WinCE 5.0下测试通过
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Size: 36661 |
Author: 唐峰 |
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Description: 基于WinCE 5.0 下的MIPS 32 内核的Au1200（AMD）的UART驱动，支持数据流控，经车载平台测试性能稳定，传输数据率高
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Size: 19229 |
Author: 唐峰 |
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Description: MIPS 32 处理器 汇编指令 速查手册
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Size: 148829 |
Author: 汪中 |
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Description: 这是一个基于mips-I结构的处理器,32bit,冯诺依曼结构-This is based on a MIPS- I structure of the processor, 32bit, von Neumann structure
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Size: 222208 |
Author: tsm998 |
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Description: 用于开发mips处理器idt 32355的源代码，测试通过-MIPS processor for the development of 32,355 Employing the source code, the test
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Size: 5120 |
Author: shqk |
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Description: i2c源代码，用于idt公司32438 mips处理器开发-i2c source code for the company Employing 32,438 MIPS processors
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Size: 4096 |
Author: shqk |
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Description: 龙芯一号的数据手册！
通用32 位微处理器，支持MIPS-III 指令
主频为200~266MHZ
基于操作队列复用的高效7 级标量流水线
高效的64 位浮点流水单元
浮点性能220 MFLOP @250MHz
内置MMU、TLB 实现从程序虚拟地址到CPU物理地址的转换-Godson manual data on the 1st! Definitive 32 microprocessor, support MIPS-III Directive megabyte of 200-266MHZ operation based cohort efficient reuse of seven scalar Pipeline efficient 64-bit floating-point pipeline unit 220 MFLOP floating point performance @ 250MHz embedded MMU. TLB realization procedures virtual address to the CPU physical address translation
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Size: 313344 |
Author: lsj |
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Description: 基于RMI1250（MIPS 32内核）通过GPIO模拟IIC驱动源码，在WinCE 5.0下测试通过-Based on RMI1250 (MIPS 32 core) through the GPIO analog source IIC driver in WinCE 5.0 under the test
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Size: 36864 |
Author: 唐峰 |
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Description: 基于WinCE 5.0 下的MIPS 32 内核的Au1200（AMD）的UART驱动，支持数据流控，经车载平台测试性能稳定，传输数据率高
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Size: 19456 |
Author: 唐峰 |
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Description: MIPS处理器VHDL代码，实现加法，减法乘除等运算，可综合，-MIPS processor VHDL code, realize adder, subtraction multiplication and division and other operations can be integrated,
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Size: 6144 |
Author: 陈丰 |
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Description: QEMU是一套由Fabrice Bellard所编写的模拟操作系统的自由软件。它与Bochs，PearPC近似，但其具有某些后两者所不具备的特性，如高速度及跨平台的特性。经由kqemu这个非自由的加速器，QEMU能模拟至接近真实电脑的速度。
可以模拟 IA-32 (x86)个人电脑，AMD 64个人电脑，MIPS R4000, 升阳的 SPARC sun3 与 PowerPC (PReP 及 Power Macintosh)架构
支持其他架构，不论在主机或虚拟系统上
增加了模拟速度，某些程序甚至可以实时运行
适用于Linux ,Windows, FreeBSD and MaxOS X这几个平台
可以储存及还原运行状态(如运行中的程序)
可以虚拟网络卡
Qemu Manager是delphi源码
qemu是c源码
这里下载源码-QEMU is a set of written by Fabrice Bellard analog of the free software operating system. It with Bochs, PearPC approximate, but it has some of the latter two do not have the features such as high-speed and cross-platform features. By this non-free kqemu accelerator, QEMU can be simulated to a level close to the real speed of the computer. Can simulate the IA-32 (x86) PC, AMD 64 PC, MIPS R4000, Sun SPARC sun3 with the PowerPC (PReP and Power Macintosh) architecture to support other structure, whether in the host or virtual system to increase the speed of a simulation, a these procedures can even be applied to real-time operating Linux, Windows, FreeBSD and MaxOS X platform these can save and restore the operational status (such as in the operation of the procedure) can be virtual network card is delphi source Qemu Manager Qemu is the c source code here to download source
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Size: 3851264 |
Author: 渔民 |
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Description: MIPS 32 处理器 汇编指令 速查手册-MIPS 32 processor compilation manual instructions Info
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Size: 148480 |
Author: 汪中 |
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Description: The MIPS32® 4KEm™ core from MIPS® Technologies is a member of the MIPS32 4KE™ processor core family. It is a
high-performance, low-power, 32-bit MIPS RISC core designed for custom system-on-silicon applications. The core is
designed for semiconductor manufacturing companies, ASIC developers, and system OEMs who want to rapidly integrate
their own custom logic and peripherals with a high-performance RISC processor. It is highly portable across processes, and
can be easily integrated into full system-on-silicon designs, allowing developers to focus their attention on end-user
products. The 4KEm core is ideally positioned to support new products for emerging segments of the digital consumer,
network, systems, and information management markets, enabling new tailored solutions for embedded applications.
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Size: 160768 |
Author: 刘刚 |
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Description: cpu设计实例mips。MIPSI指令集32位CPU （1）MiniCore设计实例全32位操作，32个32位通用寄存器，所有指令和地址全为32位
（2）静态流水线（3～5级）
（3）Forwarding技术
（4）片内L1 Cache，指令、数据各4KByte，硬件初始化
（5）没有TLB，但系统控制协处理器（CP0）具有除页面映射外的全部功能
-cpu design example mips. MIPSI instruction set 32-bit CPU
(1) MiniCore design example of the entire 32-bit operation, 32 32-bit general-purpose registers, all the commands and addresses are all 32-bit (2) static line (3 ~ 5)
(3) Forwarding technology (4 )-chip L1 Cache, command, data of all 4KByte, hardware initialization
(5) there is no TLB, but the system control coprocessor (CP0) with the exception of pages outside the full functionality of mapping
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Size: 27648 |
Author: 游笑 |
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Description: mips 32 implementation
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Size: 3658752 |
Author: aladin6891 |
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Description: 基于MIPS指令集的32位CPU设计与VHDL实现-Based on the MIPS instruction set of the 32-bit CPU design and the realization of VHDL
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Size: 10553344 |
Author: gy |
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Description: MIPS I指令集32位CPU设计实例-MIPS I instruction set design example of a 32-bit CPU
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Size: 32768 |
Author: heavenzheng |
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Description: mips processor——32bit-mips processor- 32bit
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Size: 4096 |
Author: 李忠元 |
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Description: 基于32为MIPS指令设计的cpu，32 for the MIPS instruction based on the design of the cpu-32 for the MIPS instruction based on the design of the cpu
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Size: 407552 |
Author: 罗宾 |
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