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[OS Developmem_ctrl

Description: memory control source code
Platform: | Size: 396288 | Author: chen | Hits:

[Windows Developmt48lc16m16a2

Description: SDram 接口verylog 程序 SDram 接口verylog 程序-SDram interface procedures verylog
Platform: | Size: 9216 | Author: lili | Hits:

[VHDL-FPGA-VerilogSDRAM

Description: SDRAM控制器,Verilog代码编写,让你快速了解SDRAM的读写时序。包含Modelsim仿真工程和学习笔记-SDRAM controller, Verilog coding, allows you to quickly understand the SDRAM read and write timing. Modelsim simulation engineering and contains study notes
Platform: | Size: 3031040 | Author: jianzi | Hits:

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