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[Industry research] IBM -- NAND Flash Controller Data Book DL : 0: This book begins with an overview followed by detailed information on Nand Flash controller software interface, hardware interface, functional operation and core integration.
Update : 2010-12-19 Size : 1017.76kb Publisher : peppermint
[Driver Develop] ecc_algorithm_for_web_512b DL : 0: samsung nand flash k9f series ECC algorithm
Update : 2025-02-17 Size : 168kb Publisher :
[Windows CE] COMMON11 DL : 0: 三星2410的NAND驱动，添加ECC检错。完善后的。-Samsung's NAND-driven 2410, adding ECC Frederick wrong. The perfect.
Update : 2025-02-17 Size : 37kb Publisher : 陈群
[Other] NAND_Controller_and_ECC_VHDL DL : 1: NAND Flash Controller & ECC VHDL Code-NAND Flash Controller
Update : 2025-02-17 Size : 22kb Publisher :
[Other Embeded program] ECC_program DL : 0: ecc 算法实现和纠错 1。nand_trans_result函数是实现ecc的行校验 2。nand_calculate_ecc函数是实现ecc的列校验 3。nand_correct_data函数实现1bit纠错-ecc algorithm and error-correcting one. nand_trans_result function is to achieve parity 2 rows ecc. ecc realize nand_calculate_ecc function is checking out the 3. 1bit error correction function nand_correct_data realize
Update : 2025-02-17 Size : 1kb Publisher : czhwin99
[Windows CE] NF DL : 0: nand flash的驱动文件,写的很有条理-nand flash driver files, written in a very structured
Update : 2025-02-17 Size : 4kb Publisher : lixiang
[Technology Management] ECC_Algorithm_Samsung_040624 DL : 1: Samsung NAND Flash (Error Checking & Correction)演算法原理介绍 -Samsung NAND Flash (Error Checking
Update : 2025-02-17 Size : 30kb Publisher : 趙小豪
[Technology Management] ECC_Algorithm_Toshiba_v2.1 DL : 0: Toshiba NAND Flash ECC(Error Checking & Correction)演算法原理介绍 -Toshiba NAND Flash ECC (Error Checking
Update : 2025-02-17 Size : 79kb Publisher : 趙小豪
[Documents] ecc_algorithm_for_web_512b DL : 0: 三星512b nandflash ecc 算法-Samsung 512b nandflash ecc algorithm
Update : 2025-02-17 Size : 166kb Publisher : linfy
[OS Develop] wince DL : 0: WINce的ECC算法,和读写函数,可对比MTD NAND ECC来学习-WINCE the ECC algorithm, and to read and write functions, can be compared to learn MTD NAND ECC
Update : 2025-02-17 Size : 8kb Publisher : 按时地方
[Industry research] BCH DL : 0: NAND Flash的BCH ECC算法。-NAND Flash of the BCH ECC algorithm.
Update : 2025-02-17 Size : 103kb Publisher : chencheng
[Embeded-SCM Develop] Types_of_ECC_Used_on_Flash_AN_01_e DL : 0: Spanion的关于NAND Flash的ECC算法的简单比较，有兴趣的可以看看。-NAND Flash on Spanion the ECC algorithm is relatively simple, interested can look at.
Update : 2025-02-17 Size : 82kb Publisher : chencheng
[Software Engineering] Micron_nand DL : 0: Micron Nand flash Material, including ECC, Nand Command Operation, boot from nand, hamming code. Useful to the nand driver developer.
Update : 2025-02-17 Size : 1.62mb Publisher : Alfred Cheng
[Documents] ecc_algorithm_for_web_256w DL : 1: NAND flash ECC 256 words
Update : 2025-02-17 Size : 162kb Publisher : 郑臣鑫
[VHDL-FPGA-Verilog] NAND_Controller_and_ECC_VHDL DL : 0: 完整的控制ｎａｎｄ读写的ｖｈｄｌ程序模块，包含了无缝连接的ｅｃｃ校验程序，非常值得学习借鉴-NAND read and write complete control of the VHDL program modules, including the seamless connection of ecc checking procedures, very worthwhile to learn from
Update : 2025-02-17 Size : 22kb Publisher : yangyu
[Windows Develop] BCHnandflash DL : 0: 基于nand flash 的bch源代码，采用ｃ语言时间，可以纠扇区内错误。-Nand flash-based source code of the BCH, using c language time, you can correct the error within the sector.
Update : 2025-02-17 Size : 943kb Publisher : daisy
[Driver Develop] eccalgo_040624 DL : 0: NAND Flash ECC Algorithm (Error Checking & Correction)
Update : 2025-02-17 Size : 30kb Publisher : check_prog
[VHDL-FPGA-Verilog] Flashcontrollerxilinx DL : 0: Single power supply operation — Full voltage range: 2.7 to 3.6 volt read, erase, and program operations — Separate VCCQ for 5 volt I/O tolerance n Automated Program and Erase — Page program: 512 + 16 bytes — Block erase: 8 K + 256 bytes n Block architecture — 8 Kbyte blocks + 256 byte spare area (separately erasable, readable, and programmable) — 512 byte page + 16 byte spare area for ECC and other system overhead information n Fast read and program performance (typical values) — Read: < 7 μs initial, < 50 ns sequential — Program: 200 μs (full page program at 400 ns/byte) — Erase: < 2 ms/8 Kbyte block n Pinout and package — Industry Standard NAND compatible pinout with 8-bit I/O bus and control signals — TSOP-II 44/40 pin package (standard and reverse) with copper lead frame for higher reliability — 40-ball FBGA package provides higher reliability-Single power supply operation — Full voltage range: 2.7 to 3.6 volt read, erase, and program operations — Separate VCCQ for 5 volt I/O tolerance n Automated Program and Erase — Page program: 512+ 16 bytes — Block erase: 8 K+ 256 bytes n Block architecture — 8 Kbyte blocks+ 256 byte spare area (separately erasable, readable, and programmable) — 512 byte page+ 16 byte spare area for ECC and other system overhead information n Fast read and program performance (typical values) — Read: < 7 μs initial, < 50 ns sequential — Program: 200 μs (full page program at 400 ns/byte) — Erase: < 2 ms/8 Kbyte block n Pinout and package — Industry Standard NAND compatible pinout with 8-bit I/O bus and control signals — TSOP-II 44/40 pin package (standard and reverse) with copper lead frame for higher reliability — 40-ball FBGA package provides higher reliability
Update : 2025-02-17 Size : 828kb Publisher : enyou
[Other] Eccalgo DL : 0: Samsung NAND flash ECC说明-Samsung NAND flash ECC algorithm introduction
Update : 2025-02-17 Size : 70kb Publisher : Jack Tsai
[FlashMX] ECC DL : 0: nand driver for micro device
Update : 2025-02-17 Size : 5kb Publisher : astrorainbow

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