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[Embeded-SCM Develop] DE2_NET

Description: This designs demonstrates how to use the Ethernet port using a Nios II system on the DE2 board. It sends packets, and using a loopback Ethernet cable, it ll receive the same packets which are then displayed. It also works if the board is connected to another packet source.
Platform: | Size: 564358 | Author: jemalyang | Hits:

[Embeded-SCM Develop] DE2_NET

Description: This designs demonstrates how to use the Ethernet port using a Nios II system on the DE2 board. It sends packets, and using a loopback Ethernet cable, it ll receive the same packets which are then displayed. It also works if the board is connected to another packet source.
Platform: | Size: 564224 | Author: jemalyang | Hits:

[VHDL-FPGA-Verilog] DM9000A

Description: Verilog 编写的网卡DM9000A的IP核，altera公司寄的DE2系统中的源程序核-Verilog prepared DM9000A the IP core network card, altera company sent DE2 System source of nuclear
Platform: | Size: 16384 | Author: zhyy | Hits:

[Documents] niosIIethernetconfig

Description: 描述通过软核nios II在quartus环境里面实现以太网卡配置过程，。-Described through the nios II soft-core in the Quartus environment inside Ethernet card configuration process.
Platform: | Size: 268288 | Author: ami | Hits:

[CSharp] ENC28J60

Description: LPC2103以太网口开发模块的所有例程源代码-LPC2103 Ethernet port development module source code for all routines
Platform: | Size: 418816 | Author: 李冠群 | Hits:

[Linux-Unix] 9

Description: 在 μC/OS-II 上的移植，主要是针对与 CPU 或编译器相关的文件和操作系统模拟层来 进行移植，并简要描述了 LwIP 对下层的网络接口和上层的应用程序接口的编程模 型。针对以太网控制器和网络物理层芯片的硬件特征，实现了以太网驱动程序，主 要完成以太网的初始化、中断处理以及数据的接收和发送等功能，为 LwIP 提供驱动 支持。根据嵌入式应用开发的需要，在 LwIP 协议栈的基础上实现了 TFTP 协议以及 网络烧写服务器，为 Bootloader 提供有实用性的网络下载功能-In μC/OS-II on the transplant, mainly for the CPU or the compiler and associated files and operating system emulation layer to transplant, and a brief description of the LwIP network interface on the lower and upper application program interface of the programming model. For the Ethernet controller and the network physical layer chip hardware features to achieve the Ethernet driver, mainly to complete the initialization of the Ethernet, interrupt handling and data receive and transmit functions, to provide driver support for the LwIP. According to embedded application development needs, LwIP stack on the basis of the TFTP protocol and the programming server network for the provision of practical network Bootloader download
Platform: | Size: 618496 | Author: king | Hits:

[VHDL-FPGA-Verilog] hello_world_small

Description: 采用altera mac核加88e111物理层芯片的千兆网方案，该文件是配置mac层和物理层的nios文件，基于hello world small工程。-88e111 by altera mac core and Gigabit Ethernet physical layer chip of the program, the file is configured mac layer and physical layer nios file, based on hello world small projects.
Platform: | Size: 1024 | Author: pupu | Hits:

[Embeded-SCM Develop] w5100

Description: 以太网芯片W5100驱动程序源代码,用于嵌入式系统的以太网全功能芯片。-Ethernet chips W5100 driver source code for embedded systems fully functional Ethernet chips.
Platform: | Size: 7168 | Author: 正元 | Hits:

[Internet-Network] DM9000A_ethernet

Description: 能在nios与PC之间传输udp包的程序。-transmite and receive a udp btween nios and PC.
Platform: | Size: 551936 | Author: 盛可帕 | Hits:

[VHDL-FPGA-Verilog] an483

Description: The Altera® Triple Speed Ethernet (TSE) data path reference design provides a sample SOPC Builder system using the Altera TSE MegaCore® function with two serial transceivers. This reference design demonstrates the operation of the Altera TSE MegaCore function up to the maximum wire-speed performance in hardware. The design enables you to evaluate the TSE MegaCore function for integration into Altera FPGA designs.-The Altera® Triple Speed Ethernet (TSE) data path reference design provides a sample SOPC Builder system using the Altera TSE MegaCore® function with two serial transceivers. This reference design demonstrates the operation of the Altera TSE MegaCore function up to the maximum wire-speed performance in hardware. The design enables you to evaluate the TSE MegaCore function for integration into Altera FPGA designs.
Platform: | Size: 1467392 | Author: Han | Hits:

[Embeded-SCM Develop] ggg

Description: Nios软核处理器以太网接口设计Nios soft core processor Ethernet interface design-Nios soft core processor Ethernet interface design
Platform: | Size: 1668096 | Author: jun | Hits:

[ARM-PowerPC-ColdFire-MIPS] FA161-SCH

Description: 联华众科FPGA开发板FA161核心器件为 Altera Cyclone系列FPGA EP1C6，FA161板载有SDRAM，SRAM，FLASH方便制作各种应用，开发板所带资料中包括了上位机与开发板USB通信，上位机与开发板以太网通信，上位机与开发板串口通信例程。FA161板载有USB 1.1，USB 2.0(CY7C68013A)接口，以太网接口(RTL8019AS)。FA161上可以进行HDL程序开发，可以进行nios ii程序开发，可以结合MATLAB制作DSP Builder应用。FA161上可以运行uClinux和Micro C/OS-II实时操作系统。-Lianhua Branch FPGA development board FA161 core device for Altera Cyclone series FPGA EP1C6 FA161 onboard SDRAM, SRAM, FLASH facilitate the production of a variety of applications, including the host computer and the development board development board brought information USB communication, the PCdevelopment board Ethernet communication, the host computer and the development board serial communication routines. The FA161-board have USB 1.1, USB 2.0 (CY7C68013A) interface, Ethernet interface (RTL8019AS). HDL program development, FA161 can be nios ii program development, combination of MATLAB production DSP Builder application. The FA161 can run uClinux and Micro C/OS-II real-time operating system.
Platform: | Size: 2085888 | Author: qchwu | Hits:

[VHDL-FPGA-Verilog] Ethernet_Accel_Design

Description: altera官方以太网例程（基于niosII）-Accelerating Nios II Ethernet Applications User Guide
Platform: | Size: 2655232 | Author: 王焱 | Hits:

[Software Engineering] DE2_NET

Description: DE2开发板例程源码，FPGA:EP2C35F256C6，代码基于quartus II 9.0以上的版本（随板光盘的为7.2的版本，在9.0以上的版本上编译通不过会报错）。该代码主要功能为FPGA对以太网通信，与PC机通信-In this demonstration, we will show how to send and receive Ethernet packets using the Fast Ethernet controller on DE2 board. We use the Nios II processor to send and receive Ethernet packets using the DM9000A Ethernet PHY/MAC Controller.
Platform: | Size: 1950720 | Author: chenxin | Hits:

[Software Engineering] EasyGX_V1.0_SCH

Description: EasyGX Cyclone® IV GX电路原理图，包括基于FPGA的PCI Express和10/100/1000M以太网接口相关电路。-The EasyGX Cyclone® IV GX development kit is especially suitable for develop and test PCI Express and 10/100/1000M Ethernet interface, including NIOS II embedded CPU and USB-Blaster function, which provided rich external memory for rapid prototype environment.
Platform: | Size: 220160 | Author: 王广龙 | Hits:

[Other] sdEtherUart

Description: Altera Cyclone III NIOS II + UART +SD(SPI)+ Ethernet (external ENC28J60).Recived data on uart and store to sd card and are available on the web page.
Platform: | Size: 1375232 | Author: slonok | Hits:

[Embeded-SCM Develop] niosii-triple-speed-ethernet-4sgx230-qsys-141

Description: 利用nios在altera的cyclone4sgx平台上实现一个三态以太网控制器(Implementation of a three state Ethernet controller using Nios)
Platform: | Size: 1133568 | Author: Swaggy | Hits:

[VHDL-FPGA-Verilog] niosii-triple-speed-ethernet-4sgx230-qsys-131

Description: Altera公司出的三速以太网例程，工程编译完了可以用niosii直接生成simple_socket_server，希望有用。(Altera company out of the three speed Ethernet routines, engineering finished, you can directly generate simple_socket_server using NiosII, I hope useful.)
Platform: | Size: 1160192 | Author: xxswwq | Hits:

[VHDL-FPGA-Verilog] NIOS Ethernet (enc28j60 chip)

Description: Implemented NIOS2 processor on SOPC Quartus 11.1, using internal Cyclone memory (on chip 32 kB) The software allows you to remotely access the web page. http://192.168.0.100/888 you can poke into the center through the Nios console there will be a reaction of +1 PING works.
Platform: | Size: 125284 | Author: hemamont@mail.ru | Hits:

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