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Description: 在quartusII下用verilog语言自己写的IP核,对FPGA开发初学者有帮助的。-in quartusII verilog using their own language to write the IP core, FPGA development beginners to help.
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Size: 51200 |
Author: 刘海 |
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Description: 基于高速数字信号处理器(DSP) 和大规模现场可编程门阵列( FPGA) ,成功地研制了小型
化、低功耗的实时视频采集、处理和显示平台. 其中的DSP 负责图像处理,其外围的全部数字逻辑功能都集成在一片FPGA 内,包括高速视频流FIFO、同步时序产生与控制、接口逻辑转换和对视频编/ 解码器进行设置的I2 C 控制核等. 通过增大FIFO 位宽、提高传输带宽,降低了占用EMIF 总线的时间 利用数字延迟锁相环逻辑,提高了显示接口时序控制精度. 系统软件由驱动层、管理层和应用层组成,使得硬件管理与算法程序设计彼此分离,并能协同工作. 系统中的图像缓冲区采用了
三帧的配置方案,使得该平台最终具有对PAL/ N TSC 两种制式的全分辨率彩色复合视频信号进行实时采集、显示和处理的能力.-Based on high-speed digital signal processor (DSP) and large-scale field programmable gate array (FPGA), successfully developed a smaller, low-power real-time video capture, processing and display platform. One of the DSP is responsible for image processing, all its external digital logic functions are integrated in a FPGA, including high-speed video streaming FIFO, synchronous sequential generate and control, conversion and interface logic for video encoder/decoder to set up the control of nuclear and other I2 C. through increased FIFO bit width, increase the transmission bandwidth, reducing the time occupied by EMIF bus delay phase-locked loop using digital logic,
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Size: 546816 |
Author: John |
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Description: PAL decoder, spartan 3 FPGA
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Size: 171008 |
Author: ass |
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Description: DE2上的基于FPGA视频开发资料第3部分-DE2 video
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Size: 269312 |
Author: 刘志文 |
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Description: FPGA是英文Field Programmable Gate Array的缩写,即现场可编程门阵列,它是在PAL、GAL、EPLD等可编程器件的基础上进一步发展的产物。-FPGA is the English acronym for Field Programmable Gate Array, or field programmable gate arrays, it is in PAL, GAL, EPLD and other programmable devices based on the further development of the product.
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Size: 4754432 |
Author: 刘超 |
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Description: video信号pal制转vga输出,fpga verilong语言编写-fpga pal to vga ,writed in verilog
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Size: 2042880 |
Author: james |
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Description: 基于FPGA的pal制模拟视频显示程序,verilog Hdl-pal-d vedio display fpga verilog
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Size: 1024 |
Author: wushj |
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Description: PAL-VGA格式转换器的设计,内部包含实现的FPGA代码-PAL-VGA format converter design, the internal code contains the implementation of the FPGA
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Size: 7782400 |
Author: lipeng |
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Description: FPGA开发全攻略_工程师创新设计宝典.FPGA 是英文 Field Programmable Gate Array 的缩写,即现场可编程门阵列,它是在 PAL、GAL、CPLD
等可编程器件的基础上进一步发展的产物。它是作为专用集成电路(ASIC)领域中的一种半定制电路而出现的,
既解决了定制电路的不足,又克服了原有可编程器件门电路数有限的缺点。它是当今数字系统设计的主要硬件
平台,其主要特点就是完全由用户通过软件进行配置和编程,从而完成某种特定的功能,且可以反复擦写。在
修改和升级时,不需额外地改变PCB电路板,只是在计算机上修改和更新程序,使硬件设计工作成为软件开发
工作,缩短了系统设计的周期,提高了实现的灵活性并降低了成本,因此获得了广大硬件工程师的青睐。 -FPGA development Raiders _ engineers innovative design canon. The FPGA is the abbreviation of the English Field Programmable Gate Array, field programmable gate array, it is in PAL, GAL, the CPLD
Further development of the product based on programmable devices. It appears as an application specific integrated circuit (ASIC) in the field of a semi-custom circuit,
Not only to solve the lack of custom circuits to overcome the limited number of existing programmable devices gate shortcomings. It is the main hardware of today s digital system
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Size: 9625600 |
Author: 辛璃 |
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Description: PAL_D电视信号VHDL以及verilog源程序!
FPGA设计PAL_D电视信号!VHDL源程序!两个程序都是黑白的video信号,输出可以直接在视频显示器上显示。
-PAL_D TV signal VHDL and Verilog source!
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Size: 12288 |
Author: zq |
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Description: 基于FPGA的视频图像采集系统的设计与实现的 CCD 图像传 感器采集图像, 经 DSP 处理后输出的 PAL 制 数字视频信-FPGA based video image acquisition system design and implementation of the CCD image sensor sensor image acquisition, after the treatment by DSP output PAL for digital video.
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Size: 12288 |
Author: 演的 |
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Description: FPGA写FIFO操作,然后把FIFO里的数据送到编码器里编码成PAL格式,输出-write a picture to the fifo odd and evea ,then it can be used to encode into the PAL to display
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Size: 2048 |
Author: wanggui |
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Description: 炫视科技免费pal转vga参考设计,采用lattice xp3 fpga,可移植到不同fpga产品上。 完整代码无法上传,有兴趣的发邮件索取support@hummyvision.com-Hummy vision as the technology free pal turn vga reference design, the use of lattice xp3 fpga, can be ported to different fpga products. The mail Request support@hummyvision.com complete code can not upload interested
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Size: 544768 |
Author: cloud |
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Description: 基于fpga de2平台pal制式tv实现-Pal standard platform based on fpga de2 tv realization
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Size: 16384 |
Author: jy |
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Description: FPGA是英文Field Programmable Gate Array的缩写,即现场可编程门阵列,它是在PAL、GAL、EPLD等可编程器件的基础上进一步发展的产物。它是作为专用集成电路(ASIC)领域中的一种半定制电路而出现的,既解决了定制电路的不足,又克服了原有可编程器件门电路数有限的缺点。 -FPGA Field Programmable Gate Array is the English abbreviation, ie, field programmable gate arrays, it is a product on the basis of PAL, GAL, EPLD programmable devices such as further development. It is as ASIC (ASIC) in the field of the emergence of a semi-custom circuits, both to solve the lack of custom circuits, but also to overcome the limited number of the original gates of programmable devices shortcomings.
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Size: 144384 |
Author: 李金光 |
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Description: FPGA(Field-Programmable Gate Array),即现场可编程门阵列,它是在PAL、GAL、CPLD等可编程器件的基础上进一步发展的产物。它是作为专用集成电路(ASIC)领域中的一种半定制电路而出现的,既解决了定制电路的不足,又克服了原有可编程器件门电路数有限的缺点。-FPGA (field programmable Gate Array), that is, field programmable gate arrays, it is a product of basic programmable devices in PAL, GAL, CPLD and so on the further development of the.
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Size: 177152 |
Author: 小丸子 |
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Description: FPGA产生PAL-D的VHDL和Verilog代码。-The code is used to generate the sequence of PAL with FPGA in VHDL and Verilog
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Size: 2048 |
Author: lili |
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Description: 数字信号处理的fpga实现的书籍,较详细的介绍了fpga的知识,FPGA[1]是英文Field-Programmable Gate Array的缩写,即现场可编程门阵列,它是在PAL、GAL、CPLD等可编程器件的基础上进一步发展的产物。它是作为专用集成电路(ASIC)领域中的一种半定制电路而出现的,既解决了定制电路的不足,又克服了原有可编程器件门电路数有限的缺点。FPGA采用了逻辑单元阵列LCA(Logic Cell Array)这样一个新概念,内部包括可配置逻辑模块CLB(Configurable Logic Block)、输出输入模块IOB(Input Output Block)和内部连线(Interconnect)三个部分。
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Size: 133046 |
Author: 1208443521@qq.com |
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Description: 资料->【C】嵌入系统->【C2】IC设计与FPGA->【0】综合(可编程逻辑器件、PAL、GAL、PLD、ASIC)->abel4.rar-Information-> [C] Embedded Systems-> [C2] IC Design and FPGA-> [0] Comprehensive (programmable logic device, PAL, GAL, PLD, ASIC)-> abel4.rar
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Size: 935936 |
Author: 李丽 |
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Description: 标准pal制式显示 768*576,25hz(PAL code Standard pal mode displays 768*576, 25Hz)
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Size: 1024 |
Author: lhzh7 |
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