Description: PCI总线(Slave)接口FPGA的实现代码,全部为Verilog语言源码文件,还包括测试代码,内附设计实用说明文档。-PCI Bus (Slave) interface to FPGA implementation of the code, all source code files for the Verilog language, but also test the code, included the design and practical documentation. Platform: |
Size: 428032 |
Author:Field |
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Description: pci 32位33M的从设备接口的实现源代码,使用verilog语言设计的,对设计自己的pci软核很有参考价值。-pci 32 位 33M slave device interface source code, using verilog language design, the design of their pci soft core of great reference value. Platform: |
Size: 290816 |
Author:liangwei |
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Description: PCI host: It is a PCI host controller written in verilog language. It is a interface between microprocessor and PCI slave. Platform: |
Size: 207872 |
Author:william |
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