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Description: 一个pci接口的硬件描述语言的实现源代码,用verilog语言实现-a pci interface hardware description language source code to achieve with verilog language
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Size: 428032 |
Author: 大为 |
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Description: 一个用verilog编写的总线仲裁程序。多个设备共享总线,不同设备的优先级是变化的,保证每个设备都有公平的使用总线的机会。-Verilog prepared a bus with arbitration proceedings. Multiple devices share the bus, the priority of different devices is changing to ensure that each device will have a fair opportunity to use the bus.
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Size: 3072 |
Author: bao rui |
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Description: Altera的MAXIICPLD模拟PCI接口的Verilog代码-Altera
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Size: 106496 |
Author: 王鹏 |
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Description: verilog开发的PCI target模块,能完成配置空间的读写以及单次的memory读写,原创。-Verilog development of PCI target module, to complete the reading and writing, as well as the configuration space of a single memory read and write, originality. Ha ha
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Size: 10240 |
Author: 齐培红 |
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Description: 用verilog语言编译的pci协议实现,而且有具体的电路图-Compiled with the verilog language pci protocol implementation, but also the specific circuit
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Size: 1941504 |
Author: 李超 |
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