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[Embeded-SCM Developpcit32_lattice

Description: PCI接口的Verilog源代码-PCI connection Verilog source code
Platform: | Size: 397312 | Author: 包盛花 | Hits:

[DocumentsPCI系统结构

Description: 卓越写的PCI系统结构-excellence write PCI System
Platform: | Size: 121856 | Author: 卓越 | Hits:

[BooksAddison.Wesley.PCI.Express.System.Architecture.eBo

Description: Pci Express系统结构电子书-system structure by taking PCI Express e-books
Platform: | Size: 13181952 | Author: 卓越 | Hits:

[Embeded-SCM Develop1091516677

Description: PCI总线仲裁参考设计Verilog代码-PCI bus arbitration reference design Verilog code
Platform: | Size: 3072 | Author: 熊熊 | Hits:

[VHDL-FPGA-VerilogPCI总线仲裁参考设计,Quicklogic提供

Description: PCI总线仲裁参考设计,Quicklogic提供的verilog代码-PCI bus arbitration reference design, pioneered the Verilog code
Platform: | Size: 3072 | Author: 陈旭 | Hits:

[Other Embeded programpcit32_verilog_lattice

Description: 本文件是pci的verilog源代码程序-pci the Verilog source code procedures
Platform: | Size: 430080 | Author: 王立华 | Hits:

[VHDL-FPGA-Verilogpcirtl

Description: 用verilog编写的pci——rtl级。-using Verilog prepared by the pci-- rtl level.
Platform: | Size: 197632 | Author: | Hits:

[OtherPCI_Target_ip

Description: pci core altera fpga pci开发设计资料-pci core altera fpga development of design information pci
Platform: | Size: 428032 | Author: zhouhong | Hits:

[VHDL-FPGA-Verilogpci_verilog

Description: 一个pci接口的硬件描述语言的实现源代码,用verilog语言实现-a pci interface hardware description language source code to achieve with verilog language
Platform: | Size: 428032 | Author: 大为 | Hits:

[OtherPCI_Bridge_Guest_UART

Description: 这是用pci-wishbone核和16450串口核在xilinx的fpga上实现的串口程序,用verilog实现,ise7.1,不知道这里可不可以上传硬件的程序~-pci-wishbone nuclear and nuclear Serial 16,450 in the TP xilinx They achieved a serial program, verilog realization ise7.1. Can here do not know the procedures upload hardware ~
Platform: | Size: 8427520 | Author: heartbeat | Hits:

[Graph DrawingScan_T

Description: 自己写的一个对PC并口进行的操作程序,以及对数据的读入后,进行的波形显示。(需要硬件支持 D24/56 PCI i/o接口板)-himself wrote a parallel port on PC operating procedures, and to read into the data, the waveform shows. (D24/56 need hardware support PCI i/o interface board)
Platform: | Size: 92160 | Author: zhouwj | Hits:

[MPIpci_core_verilog

Description: PCI-master的核,verilog语言,经测试,可完成芯片的综合及布线-PCI-master s nuclear, verilog language, by testing, to be completed by the integrated chip and wiring
Platform: | Size: 216064 | Author: 伊路发 | Hits:

[VHDL-FPGA-Verilogpci

Description: pci接口的verilog原代码,定义了pci接口所需要的全部引脚-pci interface Verilog source code, the definition of a pci interface pins required by all
Platform: | Size: 4096 | Author: david | Hits:

[VHDL-FPGA-Verilogtstbench

Description: pci 接口协议 用Verilog编写,经过测试使用,与大家共享-pci interface protocol using Verilog prepared, tested the use, and share
Platform: | Size: 15360 | Author: hanbing | Hits:

[OtherPCI

Description: PCI设计指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented PCI Bus interface. This interface is available in 32-bit and 64- bit versions, with support for multiple Xilinx FPGA device families. It is designed to support both Verilog-HDL and VHDL. The design examples in this book are provided in Verilog.-PCI Design Guide The Xilinx LogiCORE PCI interface is a fully verified, pre-implementedPCI Bus interface. This interface is available in 32-bit and 64-bit versions, with support for multiple Xilinx FPGA device families. Itis designed to support both Verilog-HDL and VHDL. The designexamples in this book are provided in Verilog.
Platform: | Size: 899072 | Author: lee | Hits:

[Otherlpcinterface

Description: lpc源代码verilog实现的。操作low pin count设备-LPC realize the Verilog source code. Operation of low pin count devices
Platform: | Size: 1024 | Author: 毛军捷 | Hits:

[Embeded-SCM Developcpld-pci

Description: 一个实现cpld实现简单pci接口的文章,思路比较清晰,可以看看参考。-CPLD realize realize a simple interface pci article, clearer thinking, you can look at the reference.
Platform: | Size: 830464 | Author: 张华 | Hits:

[Embeded-SCM DevelopFPGA-PCI

Description: 基于FPGA的PCI接口源代码及Testbench Verilog程序代码-fpag pci
Platform: | Size: 467968 | Author: lang | Hits:

[USB developpci-verilog

Description: USB及PCI总线设计的一些源代码(经测试)-USB and PCI bus design some of the source code
Platform: | Size: 431104 | Author: tom | Hits:

[VHDL-FPGA-VerilogVerilog-pci

Description: PCI的FPGA实现,使用verilog硬件描述语言模拟pci数据接口的数据传输过程。-PCI simulation with FPGA, using the verilog hardware describing language to simulate data transfer processes on pci data interface.
Platform: | Size: 5510144 | Author: zxc | Hits:
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