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[Embeded-SCM Developpmos20

Description: Welcome to PMOS. PMOS is a set of modules, mostly written in Modula-2, to support multitasking. PMOS was designed primarily with real-time applications in mind. It is not an operating system in the conventional sense rather, it is a collection of modules which you can import into your own programs, and which in particular allow you to write multi-threaded programs. -Welcome to PMOS. PMOS is a set of modules, mostly written in Modula-2. to support multitasking. PMOS was designed pri marily with real-time applications in mind. It is not an operating system in the conventional's ense rather, it is a collection of modules which you can impor t into your own programs. and which in particular allow you to write multi - threaded programs.
Platform: | Size: 666677 | Author: 陈智 | Hits:

[Otherhspice_analog

Description: 模拟基本电路的Hspice仿真文件 从基本的Nmos和Pmos管开始
Platform: | Size: 26025 | Author: 李春阳 | Hits:

[Embeded-SCM Developpmos20

Description: Welcome to PMOS. PMOS is a set of modules, mostly written in Modula-2, to support multitasking. PMOS was designed primarily with real-time applications in mind. It is not an operating system in the conventional sense rather, it is a collection of modules which you can import into your own programs, and which in particular allow you to write multi-threaded programs. -Welcome to PMOS. PMOS is a set of modules, mostly written in Modula-2. to support multitasking. PMOS was designed pri marily with real-time applications in mind. It is not an operating system in the conventional's ense rather, it is a collection of modules which you can impor t into your own programs. and which in particular allow you to write multi- threaded programs.
Platform: | Size: 666624 | Author: 陈智 | Hits:

[OtherVerilog

Description: verilog的简要教程 基本逻辑门,例如a n d、o r和n a n d等都内置在语言中。 • 用户定义原语( U D P)创建的灵活性。用户定义的原语既可以是组合逻辑原语,也可以 是时序逻辑原语。 • 开关级基本结构模型,例如p m o s 和n m o s等也被内置在语言中。-Verilog tutorial briefly the basic logic gates, such as and, or and NAND are built in the language. • user-defined primitives (UDP) to create flexibility. User-defined primitives are the combinational logic can be the original language may also be a temporal logic primitives. • The basic structure of switch-level models, such as PMOS and NMOS are also being built in the language.
Platform: | Size: 4169728 | Author: 阿春 | Hits:

[Other systemsCalculateWL

Description: 计算电路中晶体管的关键参数。 界面友好,功能实用。-a useful tools to calculate the scale of mos transistor. This Program is dedicated to calculate the Parameters of the MOSFET in analog IC design. Microsoft .net framework 2.0 or above is needed. 1) Input every THREE parameters in (Ids, Vdsat, Vds, W/L) to claculate the other one. Leave the textbox of the parameter to be calculated in EMPTY. 2) Input the ABS value of Ids, Vdsat and Vds for pmos. 3) Fast Switch: Use space, enter or tab to switch to the next input area quickly. 4) Dynamic Increase: Press the button "+" to increase the number of MOSFET. 5) Program can minizied to system tray. Click to bring it to front. 6) Select "On Top" when you finished calculation and intput data in other programs like Cadence Virtuoso.
Platform: | Size: 14336 | Author: 杜睿 | Hits:

[DocumentsSmall_Signal_Analysis

Description: Small Signal Analysis of a PMOS transistor. From this equation it is evident that ISD is a function of VSG, VSD, and VSB, where VSB appears due to the threshold voltage when we have to consider the body-effect.
Platform: | Size: 62464 | Author: licheng | Hits:

[DSP programTwoCMOSBandgapReferenceSourcecircuit

Description: 文章介绍了两种输出分别为不可变和可变的CMOS带隙基准电路。采用PMOS和NMOS 共源共栅电流镜代替经典结构中的电阻,给双极型晶体管提供偏置电流,降低了功耗,并 且减小了沟道长度调制效应带来的误差。采用smic0.18um工艺,3.3V电源电压进行仿真。 结果表明,在0-800C温度范围内,两种CMOS带隙基准输出电压的温度系数分别为 5x10/℃和3.1x10-5/0C 在电源电压大于2.5V时,电源电压的变化对输出电压几乎 没有影响。 -( TheGraduateSchooloftheChineseAcademyofSciences,Beijing100080) Abstract:TwotypesofCMOSbandgapreferencecircuits,withfixedandunfixed outputvoltagesrespectively,arepresentedinthispaper.Insteadofresistances inconventionalbandgapreference,acascodecurrentmirrorwithPMOSandNMOSis usedtoproducebiascurrentsforbipolartransistors,hencethedissipationand errorsresulted from the effectofthe channel length modulationareboth reduced.Thecircuitsaresimulatedinsmic0.18umCMOSprocess,with3.3volts supply.Theresultsshowthatthetemperaturecoefficientoftheoutputofthe bandgapvoltagesare5x10/0C and3.1x10-5/0C respectively thesupplyvoltage haslittleinfluenceontheoutputreferencewhenitisabove2.5volts.
Platform: | Size: 229376 | Author: 彭泽县 | Hits:

[SCMLF398

Description: LF398采样保持器,由双极性绝缘栅场效应管组成,它具有采样速度快、保持下降速度慢、精度高等特点,采样时间小于6μs时精度可达O.01%;采用双极性输入状态可获得低偏置电压和宽频带;抗干扰能力强,不易受温度影响;芯片上的逻辑输入端均为具有低输入电流的差动输入,允许直接与TTL、PMOS和CMOS相连,差动门限为1.4 V,电源电压可在士5 V和±18 V之间变化.-LF398 sample and hold device, the insulated gate bipolar field effect transistor formed, it has a sampling speed, to keep down slow, high precision, when the sampling time is less than 6μs accuracy up to O.01 with bipolar input state can achieve low offset voltage and wide bandwidth anti-interference ability, easily affected by temperature chip logic inputs are differential with low input current input, allowing direct and TTL, PMOS and CMOS linked differential threshold is 1.4 V, power supply voltage of ± 5 V and ± 18 V between the changes.
Platform: | Size: 57344 | Author: 梁珠 | Hits:

[OApmos-1.2-2865.tar

Description: 单点企业OA应用,这个事集成化一体安装包,无需设置环境。-Single Point Enterprise OA applications, this thing one integrated package, no need to set the environment.
Platform: | Size: 9845760 | Author: 运乾 | Hits:

[VHDL-FPGA-Veriloggdi1

Description: Viterbi decoder is used for decoding data encoded using Convolution Forward Error Correction codes or data that suffers inter-symbol interference. They occur in a large proportion of digital transmission. Viterbi decoders employed in digital wireless communications are complex and dissipate large power. The proposed method focuses on Gate diffusion input (GDI) which is a low power technique of digital circuit design. Dynamic component of power is reduced in GDI technique as source of PMOS is not permanently connected to Vdd.-Viterbi decoder is used for decoding data encoded using Convolution Forward Error Correction codes or data that suffers inter-symbol interference. They occur in a large proportion of digital transmission. Viterbi decoders employed in digital wireless communications are complex and dissipate large power. The proposed method focuses on Gate diffusion input (GDI) which is a low power technique of digital circuit design. Dynamic component of power is reduced in GDI technique as source of PMOS is not permanently connected to Vdd.
Platform: | Size: 1024 | Author: skb | Hits:

[hardware design基于LTC4070的锂离子电池充电电路设计

Description: 面向锂离子/聚合物电池、易于使用和纤巧的并联电池充电器系统IC LTC4070。该器件以其 450nA 的工作电流,用以前不能使用的非常低电流、断续或连续充电电源,对电池进行充电和保护。增加一个外部 PMOS 并联器件后,LTC4070 的充电电流可以从 50mA 提高(IC LTC 4070 for lithium ion polymer battery, easy to use and flexible parallel battery charger system. The device charges and protects the battery with its 450 nA operating current and a very low current, discontinuous or continuous charging power source that was previously unavailable. With the addition of an external PMOS shunt device, the charging current of LTC 4070 can be increased from 50 mA)
Platform: | Size: 78848 | Author: chrisccc | Hits:

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