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Description: IIC总线协议,VHDL语言编写,可以直接使用-IIC bus protocol, VHDL language can be used directly
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Size: 21087 |
Author: 李无志 |
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Description: VHDL语言按VGA接口标准把数字图像信号转换成标准VGA格式。适合做学习试验-VHDL by VGA interface standards, digital image signal conversion into a standard VGA format. Suitable for the pilot study
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Size: 7168 |
Author: 余飞 |
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Description: IIC总线协议,VHDL语言编写,可以直接使用-IIC bus protocol, VHDL language can be used directly
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Size: 20480 |
Author: 李无志 |
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Description: 这是一个I2C串行数据通信协议以VHDL硬件描述语言实现的IP核,可直接编译运行-I2C serial data communication protocol to VHDL hardware description language of the IP core can be directly translated Operation
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Size: 6144 |
Author: 陈州徽 |
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Description: 7. IIC 接口EEPROM 存取实验
按动开发板键盘某个键CPLD 将拨码开关的数据写入EEPROM 的某个地址,按动另
外一个键,将刚写入的数据读回CPLD,并在数码管上显示。帮助读者掌握I2C 的总线协
议和EEPROM 的读写方法。-7. IIC EEPROM Access Interface Development Board experimental pressed a button keyboard CPLD code will go into the data switch E EPROM a certain address, pressed another button, just write the data back to reading CPLD, and the digital pipe show. To help readers master the I2C bus protocol and EEPROM read and write methods.
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Size: 419840 |
Author: 赵海东 |
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Description: 用VHDL实现DALI数据传输协议,速度快,稳定,方便-using VHDL DALI data transmission protocol, speed, stability, convenience
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Size: 5120 |
Author: 张稀楠 |
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Description: PCI局部总线的中文教程,可以加快你对PCI总线通讯协议的学习理解。-PCI Local Bus Guide in Chinese, you can speed up your PCI bus communication protocol of the study and understanding.
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Size: 1171456 |
Author: 何风 |
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Description: 本代码是用VHDL语言全面、系统地描述UART通信协议标准,通过对UART进行数据通信的实际运用,能够较全面地理解和掌握VHDL和UART协议。-The VHDL language code is a comprehensive, systematic description of UART communication protocol standards, through the UART to the practical application of data communications, to more fully understand and grasp the VHDL and the UART protocol.
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Size: 22528 |
Author: fengxinya |
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Description: 串口通讯协议,你您可以自己建个工程,再将需要的VHDL文本,添加到工程中,理解程序在仿真!-Serial communication protocol, you can build your project, and then need VHDL text, added to the project, understand the procedures in the simulation!
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Size: 10240 |
Author: 张亚伟 |
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Description: zigbee协议中,可以用来进行无线定位的处理器模块说明-zigbee protocol, can be used for wireless location description of the processor module
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Size: 155648 |
Author: dd |
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Description: 完成ccitt crc的校验。针对hdlc协议控制器编写的crc校验模块。通过了仿真测试-Ccitt crc checksum completed. HDLC protocol controller for the preparation of the CRC checksum module. Through the simulation test
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Size: 1024 |
Author: |
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Description: spi协议的FPGA实现(Verlog).-spi protocol FPGA realize (Verlog).
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Size: 1024 |
Author: 徐凯 |
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Description: vhdl语言编写的实现uart协议的程序,用于rs232电气接口程序开发.支持比特率从2400-115200.-VHDL languages realize UART protocol procedures, electrical RS232 interface for program development. to support the bit rate from 2400-115200.
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Size: 5120 |
Author: 陈想 |
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Description: a parallel output controller(handshake protocol)-a parallel output controller (handshake protocol)
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Size: 4096 |
Author: humengwei |
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Description: usb接口协议。It was tested with a USB 1.1 core I have written on
a XESS XCV800 board with a a Philips PDIUSBP11A transceiver.
-usb interface protocol. It was tested with a USB 1.1 core I have written ona XESS XCV800 board with aa Philips PDIUSBP11A transceiver.
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Size: 11264 |
Author: 颜新卉 |
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Description: 为提高8051系列单片机I2C总线的工作效率,提高整机工作性能,根据I2C总线协议设计了8051单片机的I2C接口电路。-To enhance the 8051 Series Single-chip I2C bus efficiency, improve machine performance, in accordance with I2C bus protocol designed 8051 the I2C interface circuit.
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Size: 1425408 |
Author: laomo |
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Description: 本spi参数化通讯模块是一个支持SPI串行通信协议从协议的SPI从接口。可通过改变参数设置传输的位数,由外部控制器给定脉冲控制传输。-The parameters of spi communication module is a support SPI serial communication protocol from the agreement from the SPI interface. By changing the parameter settings can be transmitted over the median, given by an external controller to control transmission pulse.
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Size: 37888 |
Author: |
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Description: 基于I2C总线协议,该程序用VHDL编写了该协议的源代码,运行环境为ISE,modesim-Based on the I2C bus protocol, the procedures used to prepare the protocol VHDL source code, runtime environment for the ISE, modesim
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Size: 262144 |
Author: 马高望 |
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Description: 这是CAN总线控制器的IP核,源码是由Verilog HDL编写的。其硬件结构与SJA1000类似,满足CAN2.0B协议。-This is a IP core of the CAN bus controller written by the Verilog HDL. whose structure is similar with SJA1000,supporting the protocol of CAN2.0B.
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Size: 61440 |
Author: 普林斯 |
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Description: WLAN MAC Layer Transmitter protocol
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Size: 13312 |
Author: Ayesha |
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