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[VHDL-FPGA-Verilog] Quartus2-superLicense

Description: 万能Lisence,本许可适用于各个版本的Quartus-Omnipotent Lisence, this license applies to all versions of the Quartus
Platform: | Size: 19456 | Author: jiangmin | Hits:

[VHDL-FPGA-Verilog] PLL

Description: PLL 时钟模块　　Quartus II平台的简单设计实例　附仿真波形-PLL clock module Quartus II platform attached to a simple design example simulation waveforms
Platform: | Size: 806912 | Author: 许东滨 | Hits:

[VHDL-FPGA-Verilog] VGAdisplay

Description: VHDL入门实验。256色VGA显示驱动 开发软件Quartus II 6.0 芯片EP2c8Q208-VHDL entry experiment. 256-color VGA display driver development software Quartus II 6.0 chip EP2c8Q208
Platform: | Size: 421888 | Author: 唐锐 | Hits:

[Other] Crack_QII90_SP2

Description: Quartus II 9.0 SP2 破解-crack for Quartus II 9.0 SP2
Platform: | Size: 14336 | Author: 胡文静 | Hits:

[Embeded-SCM Develop] fft3

Description: quartus 9.0 中FFT IP核的使用方法附带工程文件和用signaltapII抓到的波形-quartus 9.0 in FFT IP core attached to the use of engineering documents and the use of captured waveform signaltapII
Platform: | Size: 13032448 | Author: hewenlong | Hits:

[VHDL-FPGA-Verilog] learn_dds

Description: 基于quartus ii 9.0的简易dds波形发生器，可以产生正弦，方波，三角波，可变幅，可变频。非常适合学习使用，使用时请按自己的芯片和引脚设置-Quartus ii 9.0 Based on dds simple waveform generator can produce sine, square, triangle wave can be amplitude, frequency can be. Very suitable for learning to use, when used by their chip and pin set
Platform: | Size: 732160 | Author: 陈东旭 | Hits:

[Windows Develop] learn_rom_99multi

Description: 基于quartus ii 9.0的99乘法器，用rom表做成的乘法器可以计算9*9的乘法，并在数码管上显示，使用时请按照自己的芯片和引脚设置。-Quartus ii 9.0 based on 99 multiplier, made by rom multiplier table can calculate the multiplication 9* 9, and in the digital control display, according to their own use when the chip and pin set.
Platform: | Size: 487424 | Author: 陈东旭 | Hits:

[VHDL-FPGA-Verilog] sdramtEST

Description: sdram动态存储器测试的源文件工程，Quartus II 9.0 (32-Bit)版本。-sdram TEST
Platform: | Size: 3500032 | Author: luyi | Hits:

[VHDL-FPGA-Verilog] LED7

Description: 七段数码管的源代码 用Quartus II 9.0 (32-Bit) 编译的七段数码管的驱动程序-thes is LED7
Platform: | Size: 256000 | Author: lhy | Hits:

[VHDL-FPGA-Verilog] sinbo

Description: 基于quartus II的正弦波发生器，可调频率相位，用其时序仿真即可显示，分模块设计的。有sin。mif文件.-Based quartus II of the sine wave generator, adjustable frequency and phase, with the timing simulation can show that sub-module design. A sin. mif file.
Platform: | Size: 995328 | Author: liyu | Hits:

[Other] Crack_Quartus+II+9.1

Description: Its crack file for Altera Quartus 9.1
Platform: | Size: 20480 | Author: Giang | Hits:

[VHDL-FPGA-Verilog] SDRAMPNIOS-II

Description: 带SDRAM的nios II系统，开发环境为Quartus II 9.0 + Nios II 9.0-With the nios II SDRAM system, development environment for the Quartus II 9.0+ Nios II 9.0
Platform: | Size: 7397376 | Author: 张非 | Hits:

[VHDL-FPGA-Verilog] led2

Description: nios ii 流水灯源程序，采用quartus ii 11.0,nios ii 11.0,qsys构建CPU，由本人亲自编写，并下载至电路板验证流水灯成功-nios ii water lights, quartus ii 11.0 nios ii 11.0 qsys build the CPU, I personally prepared and downloaded to the board verification of light water
Platform: | Size: 8006656 | Author: 王超 | Hits:

[SCM] 2dpsk4

Description: vhdl实现2dpsk，软件是Quartus II 9.0 (32-Bit)-2dpsk VHDL
Platform: | Size: 333824 | Author: fate | Hits:

[VHDL-FPGA-Verilog] clock_end

Description: 基于Quartus II 9.0 的电子时钟，用VHDL语言编写，显示时钟，星期等，可以调整。-Quartus II 9.0-based electronic clock, using VHDL language, display clock, week, etc., can be adjusted.
Platform: | Size: 991232 | Author: 严科 | Hits:

[VHDL-FPGA-Verilog] mux21a

Description: 二选一，用于FPGA编程初学阶段，简单例子，使用时解压即可，Quartus II 9.0 (32-Bit)的应用(Two choose one, for FPGA programming beginner stage, a simple example, the use of decompression can be, Quartus II 9 (32-Bit) applications)
Platform: | Size: 147456 | Author: star0402 | Hits:

[VHDL-FPGA-Verilog] (笔记)Quartus-II-9.1完全操作教程

Description: Quartus II 的操作指南 新手操作指南 有详细步骤和截屏(a detailed guide of Quartus II)
Platform: | Size: 528384 | Author: miyoujia | Hits:

[Windows Develop] quartus ii 9.0 (1)

Description: 按钮您就能叫你家那叫奶奶看见了就能理解你(buttonjnknjknjnjnkjn)
Platform: | Size: 440320 | Author: wqewe | Hits:

[Develop Tools] Quartus II 9.1 (64-Bit)可用的破解器

Description: 【实例简介】 经过验证的Quartus II 9.1 (64-Bit)可用的破解器 【实例截图】 【核心代码】 QuartusII9.1(64-Bit)可用的破解器 └── Quartus II 9.1 (64-Bit)可用的破解器 └── Quartus91Crack.rar 1 directory, 1 file
Platform: | Size: 1802462 | Author: chenpeishen2012@163.com | Hits:

[VHDL-FPGA-Verilog] multiplier fpga

Description: Multiplication of two numbers from 0 to 9. The first number is displayed on the HEX7 indicator, increases with the KEY3 button, and decreases with the KEY2 button, the second is displayed on the HEX5 indicator, increases with the KEY1 button and decreases with the KEY0 button. The LPM_MULT module is used as a library module. Simulated in Active-HDL Aldec. Project made in Quartus II.
Platform: | Size: 995970 | Author: w3bpunk | Hits:
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