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Description: 介绍几种cpuThe 8xC251SA/SB/SP/SQ improves on the MCS-51 architecture and peripheral features, introducing the advanced register based CPU architecture i.e., the MCS 251 microcontroller architecture. The register based CPU supports a 40-byte register file. In addition, the 8xC251SA/SB/SP/SQ microcontroller has 256-Kbyte expanded external code/data memory space and 64-Kbyte stack space. The new controller is also specially designed to execute C code efficiently. More importantly, the 8xC251SA/SB/SP/SQ maintains binary code compatibility with MCS 51 microcontrollers but at the same time allows the use of the powerful MCS 251 microcontroller instruction set, with many new 8, 16 and 32 bit instructions available. The 8xC251SA/SB/SP/SQ has 512 bytes or 1 Kbyte of on-chip data RAM options and is available in 16 Kbytes and 8 Kbytes of on-chip ROM/OTPROM or ROMless options. -introduced several cpuThe 8xC251SA/SB/SP/SQ improves on the MCS-51 architecture and peripheral features, introducing the advanced register based CPU architecture ie, the MCS 251 microcontroller architecture. The register based CPU supports a 40-byte register file. In addition, the microcontroller has 8xC251SA/SB/SP/SQ 256-Kbyte expanded external code / data memory space and 64-Kbyte stack space. The new controller is also specially designed to efficiently execute C code. More importantly, the 8xC251SA / SB / SP / SQ maintains binary code compatibility with MCS 51 microcontrollers but at the same time allows the use of the powerful MCS 251 microcontroller instruction set, with many new 8, 16 and 32 bit instructions available. The 8xC251SA/SB/SP / SQ has 512 bytes or 1 Kbyte of on-chip data
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Size: 954967 |
Author: 刘市贵 |
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Description: 介绍几种cpuThe 8xC251SA/SB/SP/SQ improves on the MCS-51 architecture and peripheral features, introducing the advanced register based CPU architecture i.e., the MCS 251 microcontroller architecture. The register based CPU supports a 40-byte register file. In addition, the 8xC251SA/SB/SP/SQ microcontroller has 256-Kbyte expanded external code/data memory space and 64-Kbyte stack space. The new controller is also specially designed to execute C code efficiently. More importantly, the 8xC251SA/SB/SP/SQ maintains binary code compatibility with MCS 51 microcontrollers but at the same time allows the use of the powerful MCS 251 microcontroller instruction set, with many new 8, 16 and 32 bit instructions available. The 8xC251SA/SB/SP/SQ has 512 bytes or 1 Kbyte of on-chip data RAM options and is available in 16 Kbytes and 8 Kbytes of on-chip ROM/OTPROM or ROMless options. -introduced several cpuThe 8xC251SA/SB/SP/SQ improves on the MCS-51 architecture and peripheral features, introducing the advanced register based CPU architecture ie, the MCS 251 microcontroller architecture. The register based CPU supports a 40-byte register file. In addition, the microcontroller has 8xC251SA/SB/SP/SQ 256-Kbyte expanded external code/data memory space and 64-Kbyte stack space. The new controller is also specially designed to efficiently execute C code. More importantly, the 8xC251SA/SB/SP/SQ maintains binary code compatibility with MCS 51 microcontrollers but at the same time allows the use of the powerful MCS 251 microcontroller instruction set, with many new 8, 16 and 32 bit instructions available. The 8xC251SA/SB/SP/SQ has 512 bytes or 1 Kbyte of on-chip data
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Size: 954368 |
Author: 刘市贵 |
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Description: 循环冗余校验CRC (Cyclic Redundancy Check)码是由分组线性码的分支而来，其主要应用是二元码字。编码简单且误判概率很低，在通信系统中得到了广泛的应用。循环冗余校验码是属于分组码中的一类重要的线性码，它不仅在理论上具有很好的代数结构，而且其编码和译码可以通过线性移位寄存器很容易地实现。
通过对CRC的分析和基于MATLAB工具的仿真，充分证明了CRC的检错能力很强，编码简单。
-Cyclic Redundancy Check CRC (Cyclic Redundancy Check) code is a linear code from the sub-branch from the main application is the binary code word. Coding is simple and very low probability of miscarriage of justice, in the communication system has been widely used. Cyclic redundancy check code is a block code in one important class of linear code, which not only has good in theory, algebraic structure, and its encoding and decoding of linear shift register can easily realize . CRC through analysis and simulation tool based on MATLAB, and fully proves that the CRC error detection ability of a strong, simple coding.
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Size: 7168 |
Author: 王明 |
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Description: 32×32的寄存器堆，它有32个32位的寄存器、两个读端口和一个写端口。该寄存器堆由3个层次共5个模块构成，最低层次的模块是D触发器，中间层次的模块包括32位寄存器、5位地址译码器、32选1多路选通器，顶层模块是寄存器堆模块。设计采用行为建模和结构建模相结合的方法，先用行为建模方法建立低层模块，然后再用结构建模方法搭建高层模块。-32 × 32 of the register file, it has 32 32-bit registers, two read ports and one write port. The register file by the three levels of a total of five modules, the lowest level module is the D flip-flop, middle-level module including 32-bit register, address decoder 5, 32 election more than one way strobe, and top-level module is Register File module. Design using behavioral modeling and structural modeling method of combining the first act of modeling methods used to establish low-level modules, then the structural modeling method to build high-level module.
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Size: 4096 |
Author: 甜 |
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Description: 32位寄存器的VHDL的原代码下载,COOLCOOLCOOL-32-bit register of the original VHDL code download, COOLCOOLCOOL
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Size: 3072 |
Author: LIU |
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Description: C2000软件开发基础.doc
例1、SCI寄存器的宏定义
例2、采用宏定义方法访问SCI寄存器
例3、SCI寄存器文件结构定义
例4、SCI寄存器文件结构变量
例5、将变量分配到数据段
例6、将数据段映射到寄存器对应的存储空间
例7、通信控制器和控制寄存器1的位定义
例8、通信控制器和控制寄存器1的共同体定义
例9、使用共同体定义寄存器文件结构体
例10、在C/C++中使用位区操作寄存器
例11、TMS320X280x PCLKCR0位区定义
例12、产生的位区访问汇编代码
例13、使用.all共同体成员优化代码
例14、使用Shadow寄存器优化代码
例15、IQ Math应用举例
-C2000 software development foundation. Doc Cases 1, SCI register macro definition of Example 2, using the definition of method Acer register SCI patients 3, SCI register file structure of the definition of cases 4, SCI register file structure variables Example 5, the variable assigned to the data segment cases 6, the data segment is mapped to the register corresponding to 7 cases of storage space, communications controller and the control register 1, bit 8 of the definition of cases, communication controllers and control register 1 of the Community definition of 9 cases, the use of the Community definition of the structure of register file structure 10 in C/C++ DC operation using register cases of 11, TMS320X280x PCLKCR0 the definition of cases of DC 12, DC generated assembly code to visit 13 patients, the use of. all members of the Community of 14 cases of optimized code, use the Shadow Register optimized code cases of 15, IQ Math Applications
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Size: 17408 |
Author: haoz |
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Description: 实用功能主要有：文件分割与合并、文件加解密(新增)、控件注册(新增)、
显示/恢复桌面(新增)、定时关机(新增)、开机自启动(新增)、显示/隐藏宠物、
定制自我情话、暂停情话播放、两岸通--简繁字体互转、窃取星号密码、位图转
换为文本、文件隐藏到位图中、发送邮件、光驱管理、系统管理等等。-Practical features include: split and merge files, file encryption and decryption (new), the control register (new), show/Recovery Desktop (new), timing shutdown (new), the boot since the launch of the (new), show/hide the pets, custom self-love, then love, then suspend the players, the two sides pass- Simplified fonts conversion, theft of asterisk password, bitmap converted to text, documents hidden map in place, sending mail, drive management, system management, etc. and so on.
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Size: 1213440 |
Author: gcl |
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Description: 文件加密注册工具 复制序列号即可生成加密文件 方便使用-Register file encryption tool to copy the serial number to generate an encrypted file to facilitate the use of
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Size: 104448 |
Author: andrew |
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Description: 用Visual C++语言实现对文件读写,win.ini文件和注册表的读写。已编译运行。-Using Visual C++ Language to read and write file.Include reading and writing of WIN.INI file and Register Table。
The program has been compiled and done well.
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Size: 48128 |
Author: rcd |
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Description: Crime File System is a system used to report crimes. This project will be done using VB 6.0 as front end, and MS Access as back end. It can used to report crime. This project is mainly useful for police stations. This system will help to manage all the activities in a police station using computers. Currently all the works are done manually, by computerizing all the activities inside a police station can be managed easily and effectively.
The modules involved in this project are:
• Login for user and admin
• Complaint registration
• View complaint status
• Criminal register management
• FIR Management
• Case History Details management
• Managing Postmortem details
• Prisoners register management
• Manage list about most wanted criminals
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Size: 2009088 |
Author: Remya |
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Description: 国内较早讨论寄存器文件结构的文章，对FPGA和risc开发具有指导作用-talk about the register file structure and realization problem.
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Size: 640000 |
Author: 刘月 |
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Description: The AVR Enhanced RISC microcontroller supports powerful and efficient addressing modes for access to the Program memory (Flash) and Data memory (SRAM, Register file, I/O Memory, and Extended I/O Memory). This section describes
the various addressing modes supported by the AVR architecture.
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Size: 1146880 |
Author: calin17us |
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Description: MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed
below.
Features
Hardware Features
• Data Path Width 32 bits, with Four stage pipeline.
• Mixed 16/32 bit instructions for code density
• Von Neumann Architecture (Data and Instruction in the same
address space).
• Sixteen, 32 bit General Purpose Registers.
• Four USER defined instructions (with Register File Write back
capability).-MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed
below.
Features
Hardware Features
• Data Path Width 32 bits, with Four stage pipeline.
• Mixed 16/32 bit instructions for code density
• Von Neumann Architecture (Data and Instruction in the same
address space).
• Sixteen, 32 bit General Purpose Registers.
• Four USER defined instructions (with Register File Write back
capability).
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Size: 3395584 |
Author: hfayed |
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Description: register file in vhdl and alu
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Size: 6144 |
Author: afzal74 |
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Description: 用VHDL代码写的模拟微处理器核程序，有计算模块和register file 等模块，并包含测试程序，调试程序 ACTIVE HDL-Simulation with the VHDL code is written in the microprocessor core procedures, such as computing modules, and register file module, and includes test program, the debugger ACTIVE HDL
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Size: 43008 |
Author: 三木 |
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Description: a register file pdf that use to uptain sth so much large
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Size: 38912 |
Author: rahi |
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Description: register file concept for computer science
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Size: 18432 |
Author: Xpology World |
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Description: register file using verilog
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Size: 4096 |
Author: tran |
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Description: regsrv32，实现系统注册文件，版本LabVIEW20-regsrv32，register file，LabVIEW2011
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Size: 16384 |
Author: lin |
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Description: ALU&Register Files(RF)之實現和其資料路徑的組合，包含了(1)ALU(2)Register File (RF)(3)Serial-in parallel-out register file(4)ALU + RF datapath-To learn the Verilog design for ALU and Register Files which are two main building blocks of a CPU.
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Size: 6144 |
Author: sara kuo |
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