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[VHDL-FPGA-Verilog] FPGA控制VGA显示（Verilog）

Description: 用FPGA开发板控制VGA显示，以800*600的分辨率，首先在屏幕的正中央依次出现“新”“年”“快”“乐”四个汉字，并分别移动到屏幕的四个角落，接着在屏幕中部从左至右依次出现“Happy New Year”英文字样，然后出现三个由小到大再消失的圆形图标模拟烟花，最后在黑屏中闪烁金星。字体均采用不同颜色，增添喜庆气氛。 本代码是练习VGA控制，ROM调用，时序控制及状态机运用的一个综合实例！
Platform: | Size: 11611 | Author: hangman_102@126.com | Hits:

[VHDL-FPGA-Verilog] sram

Description: sram 读写小程序，用verilog编写的，请各位高手指教-SRAM read and write small programs using Verilog prepared, please enlighten you master
Platform: | Size: 1024 | Author: kevin | Hits:

[VHDL-FPGA-Verilog] Verilog-HDL

Description: 本CD-ROM包括《Verilog-HDL实践与应用系统设计》一书中的全部例子，这些例子全部通过了验证。第七章以后的设计实例，不仅有Verilog-HDL的例子，也附了包括VB、VC++等源程序,甚至将DLL的生成方法也详尽地作了说明。 -the CD-ROM include "Verilog-HDL Practice and Application System Design," a book the whole Examples of these examples were passed certification. After the seventh chapter, a design example is not only Verilog-HDL example, the report include VB, VC and other source files, even DLL generator also described in detail.
Platform: | Size: 784384 | Author: 东子 | Hits:

[VHDL-FPGA-Verilog] rom

Description: Read-only memory,Verilog code
Platform: | Size: 8192 | Author: leigh lee | Hits:

[Other Embeded program] verilog_sin_complete

Description: verilog设计正弦波波形模块,可自己通过参数设置得到所需峰值的波形-Verilog design module sinusoidal waveform can be themselves through the necessary parameters of the waveform peak
Platform: | Size: 3072 | Author: 刘彬 | Hits:

[VHDL-FPGA-Verilog] eeprom

Description: eeprom的Verilog HDL源代码，含eeprom的读写！Quartus II5.0平台测试通过！-EEPROM of the Verilog HDL source code, including reading and writing EEPROM! Quartus II5.0 platform test!
Platform: | Size: 521216 | Author: | Hits:

[VHDL-FPGA-Verilog] rom

Description: 一个 16×8bit 的ROM程序包括程序的初始化。-A 16 × 8bit the ROM initialization procedures, including procedures.
Platform: | Size: 3072 | Author: h13978699183 | Hits:

[VHDL-FPGA-Verilog] an_dcfifo_top_restored

Description: alteral FPGA VERILOG 利用 ROM DCFIFO 和RAM 实现高速到低速时钟域的数据传输 ，值得学习。-alteral FPGA VERILOG using ROM DCFIFO and RAM to realize high-speed low-speed clock domain data transfer, it is worth learning.
Platform: | Size: 928768 | Author: alison | Hits:

[VHDL-FPGA-Verilog] rom

Description: 我用VHDL写的正弦，用FPGA内部ROM，有仿真testbench,在quartus里可以运行。在板子里已经验证-I used to write VHDL sinusoidal, using FPGA internal ROM, has simulation testbench, you can run in Quartus. Yard has already been verified in the plates
Platform: | Size: 651264 | Author: jimmy | Hits:

[VHDL-FPGA-Verilog] Verilog-HDL

Description: 《Verilog-HDL实践与应用系统设计》一书中的光盘源文件- Verilog-HDL practice and application of system design, a book on CD-ROM source file
Platform: | Size: 771072 | Author: 范田田 | Hits:

[VHDL-FPGA-Verilog] miffile

Description: 用matlab产生mif文件。(Altera的EDA软件，如maxplus，quartus等用到的初始化rom，ram等的文件格式)-Mif files generated by matlab. (Altera' s EDA software, such as maxplus, quartus used to initialize and so on rom, ram, such as the file format)
Platform: | Size: 1024 | Author: 何亮 | Hits:

[VHDL-FPGA-Verilog] verilog

Description: 《数字信号处理的FPGA实现》（第二版）光盘verilog代码-" The FPGA digital signal processing to achieve" (second edition) CD-ROM code verilog
Platform: | Size: 330752 | Author: 王昊 | Hits:

[SCM] rom

Description: Rom的读取的Verilog代码，自己编写的，大家参考参考啊-Rom read the Verilog code, I have written, your information ah
Platform: | Size: 1024 | Author: keke | Hits:

[VHDL-FPGA-Verilog] rom

Description: 基于Verilog语言编写的各种只读存储器rom和随机存储器ram-Verilog language based on a variety of read-only memory rom and random access memory ram
Platform: | Size: 704512 | Author: 李辽原 | Hits:

[VHDL-FPGA-Verilog] rom

Description: 基于verilog的rom存储器 简单实用 初学者的好材料-Rom memory, based on simple and practical verilog' s good material for beginners
Platform: | Size: 445440 | Author: majianbiao | Hits:

[VHDL-FPGA-Verilog] Rom

Description: ROM的VERILOG实现，非常不错-ROM of the VERILOG achieve very good ~ ~
Platform: | Size: 373760 | Author: 侯勇 | Hits:

[VHDL-FPGA-Verilog] ROM

Description: Verilog sine的查找表，相信大家会用到-Verilog sine lookup table, I believe we will use
Platform: | Size: 3072 | Author: wuzhongpeng | Hits:

[VHDL-FPGA-Verilog] rom

Description: verilog 编写的rom代码，开发环境为quartus-rom write verilog code development environment for quartus
Platform: | Size: 97280 | Author: li | Hits:

[VHDL-FPGA-Verilog] ahdl--sine-wave-code-with-rom-look-up-table_imp.r

Description: hi this an verilog codes-hi this is an verilog codes
Platform: | Size: 8192 | Author: praha | Hits:

[VHDL-FPGA-Verilog] ram rom verilog

Description: ram rom verilog hdl verilog
Platform: | Size: 5618 | Author: mamine2ia | Hits:
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