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Description: IA4420 工作在315/433/868/915MHz 频段(IA4421 工作在433/868/915MHz 频段);
2. 低电压工作,工作电压2.2V~5.4V;
3. 低功耗模式,待机电流0.3uA;
4. 调制模式FSK,并具备高度集成的PLL;
5. 低发射功率、高接收灵敏度设计,发射功率5~10 dbm 可调,接收灵敏度-109 dbm;
6. 内置时钟输出,可省掉MCU 的晶振;
7. 传输数据率高,数字信号可达115.2 kbit/s,模拟信号可达256 kbit/s;
8. 发射频偏与接收带宽可调;
9. 内部有数字滤波器,并可以根据要求选择不同的方式;
10. SPI 的控制接口,方便使用;
11. 接收时有数据同步码识别器,系统检测同步码后将后面的数据输出;
12. 有16 位的收发缓存器,用来缓存接收到或要发送的数据(接收数据有两种方式,用户可以按需选择);
13. 有低电压检测器,从2.2-5.4V 可调;
14. 有定时唤醒功能,定时时间可达几天;
15. 天线的兼容性强,有天线自动调节功能,并可采用PCB 或外置天线;
16. 工作温度范围-40~85,储存温度范围-55~125℃;
17. 采用微小TSSOP16 封装。
-315/433/868/915MHz IA4420 work in the band (IA4421 Working in 433 / 868/915MHz band); 2. Low-voltage, voltage 2.2 V ~ 5.4V; 3. Low-power mode, standby current 0.3 uA 169 * 85 *; 4. FSK modulation mode, and highly integrated PLL; 5. Low emission power and high receiver sensitivity, launched power 5 ~ 10 dbm adjustable, -109 dbm receiver sensitivity; 6. Built-in clock output can be saved MCU resonator; 7. Higher data transmission rate, digital signal of up to 115.2 kbit / s, analog signal up to 256 kbit / s; 8. Emission Offset and receiving adjustable bandwidth; 9. Internal digital filters, and may request to have a choice of different ways; 10. SPI control interface, and ease of use; 11. When receiving data synchronization code identifier, the system will detect synchronous code behind the
Platform: |
Size: 39433 |
Author: songxiaoyan2008 |
Hits:
Description: 2006altera大赛-基于软核Nios的宽谱正弦信号发生器设计:摘要:本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台,将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上,利用直接数字频率合成技术、数字调制技术实现所要求波形的产生,用 FPGA 中的 ROM 储存 DDS 所需的波形表,充分利用片上资源,提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理(DSP)技术,通过在 Nios 中软件编程解决
不同的调制方式的实现和选择。系统频率实现 1Hz~20MHz 可调,步进达到了1Hz;完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。
-2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I / O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
Platform: |
Size: 407706 |
Author: 刘斐 |
Hits:
Description: 我的一个项目用到的,找了好久的电话机标准,DTMF,FSK,和台湾的标准-I used in a project, find the phone for a long time standards, DTMF, FSK, and Taiwan's standards
Platform: |
Size: 581424 |
Author: sun |
Hits:
Description: 摘要:AD9852是美国ANALOGDEVICES公司生产的新型直接数字频率合成器(DDS),具有频率转换速度快(小于lt~s)、频谱纯度高、工作温度范围宽(一25℃~+85℃)、集成度高等特点,是一种使用方便灵活、功能较强的芯片。AD9852由带有48位相位累加的数控振荡器、可墒程参考时钟倍乘器、反向正弦滤波器、计数倍乘器、两个300MHz12住数模转换器、高速模拟比较器和接口逻辑组成。可用于本振合成回路,高精度时钟发生器和FSK//3PSK调制。文中介绍了AD9852的工作原理、引脚功能以厦具体应用。
Platform: |
Size: 126957 |
Author: 梅名 |
Hits:
Description: IA4420 工作在315/433/868/915MHz 频段(IA4421 工作在433/868/915MHz 频段);
2. 低电压工作,工作电压2.2V~5.4V;
3. 低功耗模式,待机电流0.3uA;
4. 调制模式FSK,并具备高度集成的PLL;
5. 低发射功率、高接收灵敏度设计,发射功率5~10 dbm 可调,接收灵敏度-109 dbm;
6. 内置时钟输出,可省掉MCU 的晶振;
7. 传输数据率高,数字信号可达115.2 kbit/s,模拟信号可达256 kbit/s;
8. 发射频偏与接收带宽可调;
9. 内部有数字滤波器,并可以根据要求选择不同的方式;
10. SPI 的控制接口,方便使用;
11. 接收时有数据同步码识别器,系统检测同步码后将后面的数据输出;
12. 有16 位的收发缓存器,用来缓存接收到或要发送的数据(接收数据有两种方式,用户可以按需选择);
13. 有低电压检测器,从2.2-5.4V 可调;
14. 有定时唤醒功能,定时时间可达几天;
15. 天线的兼容性强,有天线自动调节功能,并可采用PCB 或外置天线;
16. 工作温度范围-40~85,储存温度范围-55~125℃;
17. 采用微小TSSOP16 封装。
-315/433/868/915MHz IA4420 work in the band (IA4421 Working in 433/868/915MHz band); 2. Low-voltage, voltage 2.2 V ~ 5.4V; 3. Low-power mode, standby current 0.3 uA 169* 85*; 4. FSK modulation mode, and highly integrated PLL; 5. Low emission power and high receiver sensitivity, launched power 5 ~ 10 dbm adjustable,-109 dbm receiver sensitivity; 6. Built-in clock output can be saved MCU resonator; 7. Higher data transmission rate, digital signal of up to 115.2 kbit/s, analog signal up to 256 kbit/s; 8. Emission Offset and receiving adjustable bandwidth; 9. Internal digital filters, and may request to have a choice of different ways; 10. SPI control interface, and ease of use; 11. When receiving data synchronization code identifier, the system will detect synchronous code behind the
Platform: |
Size: 38912 |
Author: |
Hits:
Description: 2006altera大赛-基于软核Nios的宽谱正弦信号发生器设计:摘要:本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台,将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上,利用直接数字频率合成技术、数字调制技术实现所要求波形的产生,用 FPGA 中的 ROM 储存 DDS 所需的波形表,充分利用片上资源,提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理(DSP)技术,通过在 Nios 中软件编程解决
不同的调制方式的实现和选择。系统频率实现 1Hz~20MHz 可调,步进达到了1Hz;完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。
-2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I/O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
Platform: |
Size: 407552 |
Author: 刘斐 |
Hits:
Description: 我的一个项目用到的,找了好久的电话机标准,DTMF,FSK,和台湾的标准-I used in a project, find the phone for a long time standards, DTMF, FSK, and Taiwan's standards
Platform: |
Size: 580608 |
Author: sun |
Hits:
Description: 摘要:AD9852是美国ANALOGDEVICES公司生产的新型直接数字频率合成器(DDS),具有频率转换速度快(小于lt~s)、频谱纯度高、工作温度范围宽(一25℃~+85℃)、集成度高等特点,是一种使用方便灵活、功能较强的芯片。AD9852由带有48位相位累加的数控振荡器、可墒程参考时钟倍乘器、反向正弦滤波器、计数倍乘器、两个300MHz12住数模转换器、高速模拟比较器和接口逻辑组成。可用于本振合成回路,高精度时钟发生器和FSK//3PSK调制。文中介绍了AD9852的工作原理、引脚功能以厦具体应用。 -Abstract: AD9852 is Analog Devices Inc. The United States produced a new type of direct digital synthesizers (DDS), with frequency conversion speed (less than lt ~ s), the spectrum of high purity, the working temperature range of width (1 25 ℃ ~+ 85 ℃) , high integration, is a flexible and easy to use, more powerful chips. AD9852 by a cumulative 48 DCO phase can be moisture-way Multiplier times the reference clock, reverse sine filter, multiplying count, two 300MHz12 live digital, high-speed analog comparator, and interface logic composition. Can be used in the synthesis loop vibration, high-precision clock generator and FSK// 3PSK modulation. This paper introduces the working principle of AD9852, pin functions to specific application of Xiamen.
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Size: 126976 |
Author: 梅名 |
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Description: 串口调试助手,一个很不错的东西,希望大家能用的着,就这-Serial debugging assistant, a very good thing, I hope the U.S. can, and on this
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Size: 1939456 |
Author: xieshuming |
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Description: 一个关于FSK的matlab编写的小程序,欢迎大家指正讨论-FSK s matlab on the preparation of small procedures, welcome to correct me to discuss
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Size: 1024 |
Author: HDH |
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Description: FSK调制与解调,整个设计基于ALTERA公司的QuartusⅡ开发平台,并用Cyclone系列FPGA实现。所设计的调制解调器具有体积小、功耗低、集成度高、软件可移植性强、扰干扰能力强的特点,符合未来通信技术设计的方向。-FSK modulation and demodulation, the entire design is based on ALTERA' s development platform Quartus Ⅱ, and Cyclone series FPGA implementation. Designed by the modem with a small size, low power consumption, high integration, software portability, and strong interference immunity characteristics consistent with the design of future communication technology direction.
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Size: 575488 |
Author: 张继峰 |
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Description: ST7540 FSK powerline transceiver
design guide for AMR
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Size: 1042432 |
Author: ruo |
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Description: 采用配电线载波系统
的配电自动化
第5-1部分:低层协议—扩频型移频键控
(S-FSK)规约
-Using distribution line carrier system, distribution automation the first 5-1 parts: the lower the agreement- spread-spectrum frequency-shift keying-type (S-FSK) of the Statute
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Size: 86016 |
Author: lyj |
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Description: 如何通过互联网共亨以单片机应用系统为中心的小型嵌入式设备的信息,成为当今电子界 ... 多任务操作,可以在MCU执行数据采集和控制功能的同时把数据打包并传送到互联网上。 ... 直接驱动普通I/O口实现硬件外设功能(如UART、 I2C、SPI、 Caller ID、FSK等)-How to Hang a total through the Internet-centric single-chip microcomputer application system for small embedded devices, for today' s electronic world ... multi-task operation, could be in the MCU to perform data acquisition and control functions at the same time the data package and send it to the Internet on. ... Direct-drive regular I/O port to achieve the hardware peripheral functions (such as UART, I2C, SPI, Caller ID, FSK, etc.)
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Size: 117760 |
Author: 流留 |
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Description: 自己搜集的FSK解调材料,比较全,对于做FSK解调的人很有帮助-FSK demodulation material' s own research, compare the whole, for people who do FSK demodulation helpful
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Size: 3568640 |
Author: 张朋 |
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Description: fsk在matlab的simmulink上面的仿真-fsk matlab' s simmulink in the above simulation
Platform: |
Size: 8192 |
Author: dffgdds |
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Description: 用随机数发生器产生二进制序列,他作为FSK调制器的输入。FSK调制器的输出受到概率a的加性高斯噪声污染,仿真得出系统的误码率。- Has the binary sequence with the random number generator, he takes FSK modulator s input. The FSK modulator s output receives probability the Canada Gauss noise pollution, the simulation obtains system s error rate.
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Size: 2048 |
Author: xiaoxiao |
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Description: 基于matlab的fsk调制的代码,可以实现仿真-it s fsk
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Size: 5120 |
Author: 方俊 |
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Description: ti s-fsk电力载波通信模块,供各位参考一下-Spread_Frequency shift Keying Power Line Monem Software Architecture
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Size: 590848 |
Author: 王洪涛 |
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Description: 改程序的主要功能,是实现fsk的相关解调,通过该程序可以从总体上聊天fsk调制。-Change the program' s main function is to achieve fsk demodulator fsk modulation through the program from the general chat.
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Size: 1024 |
Author: wanghengyong |
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