Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - shifter

Search list

[VHDL-FPGA-Verilog] Shifters_vhdl

Description: -- Title : Barrel Shifter (Pure combinational) -- This VHDL design file is an open design you can redistribute it and/or -- modify it and/or implement it after contacting the author -- You can check the draft license at --- Title : Barrel Shifter (Pure combinational)-- This VH DL design file is an open design you can redistri bute it and/or-- modify it and/or implement it a fter contacting the author-- You can check the d raft license at
Platform: | Size: 2048 | Author: 陈朋 | Hits:

[Other] Log_Shifter_Gate_Level_Design

Description: Log Shifter Gate Level Design using Verilog(IC design Lab) and Lab Note
Platform: | Size: 2929664 | Author: eknngx | Hits:

[VHDL-FPGA-Verilog] shifter

Description: 8位双向移位寄存器: 实现串行数据与并行数据的转换,移位寄存数据功能的-8-bit bi-directional shift register: the realization of serial data and parallel data conversion, data storage function of displacement
Platform: | Size: 45056 | Author: 罗子 | Hits:

[VHDL-FPGA-Verilog] barrel_shifter

Description: VHDL实现的桶型移位器，能在一个时钟周期实现对数据的（0－12位）算术右移-VHDL implementation of a barrel—shifter, able to achieve at one clock cycle of data (0-12 bit) Arithmetic Shift Right
Platform: | Size: 1024 | Author: 过时无双 | Hits:

[Windows Develop] shifter

Description: this is an example of a shifter in VHDL language
Platform: | Size: 2048 | Author: saoussen | Hits:

[VHDL-FPGA-Verilog] Shifter

Description: 这是一个用vHDL语言实现的移位器，可以实现移位功能-This is the design of an shifter using vhdl
Platform: | Size: 184320 | Author: maxpayne | Hits:

[VHDL-FPGA-Verilog] shifter

Description: 移位运算器SHIFTER 使用Verilog HDL 语言编写，其输入输出端分别与键盘/显示器LED 连接。移位运算器是时序电路，在J钟信号到来时状态产生变化， CLK 为其时钟脉冲。由S0、S1 、M 控制移位运算的功能状态，具有数据装入、数据保持、循环右移、带进位循环右移，循环左移、带进位循环左移等功能。 CLK 是时钟脉冲输入，通过键5 产生高低电平M 控制工作模式， M=l 时带进位循环移位，由键8 控制CO 为允许带进位移位输入，由键7 控制:S 控制移位模式0-3 ，由键6 控制，显示在数码管LED8 上 D[7..0]是移位数据输入，由键2 和1 控制，显示在数码管2 和1 上 QB[7..0]是移位数据输出，显示在数码管6 和5 上:cn 是移位数据输出进位，显示在数码管7 上。-SHIFTER shift calculator using Verilog HDL language, the input and output side with the keyboard/display LED connection. Shift operator is a sequential circuit, in J when the bell signals the arrival of a state of change, CLK its clock. By S0, S1, M to control the functions of the state of shift operations, with data loading, data maintenance, cycle shifted to right, into the digital cycle shifted to right, circle left, circle to the left into the digital functions. CLK is the clock pulse input through the key high 5 low M mode control, M = l-bit cyclic shift into when, controlled by the key 8 into the displacement of CO to allow input from 7 control keys: S Control Shift Mode 0-3, 6 button control from showing in the digital control LED8 on D [7 .. 0] is the shift data input from the keys 2 and 1 control, displayed in the digital tube 2 and 1 QB [7. .0] is the displacement data output, displayed on the LED 6 and 5: cn is a binary data output shift, showing 7 on in the digital co
Platform: | Size: 129024 | Author: 623902748 | Hits:

[VHDL-FPGA-Verilog] ALU

Description: VHDL实现cpu核心逻辑与运算单元模块的实现，完成4bit*4bit输入8bit输出的运算，可做加减乘除逻辑移位6种操作-the implementation of Arithmetic and logic unit based on VHDL, can do as the adder,subtractor,multiplier,divider,shifter and logic operation.
Platform: | Size: 619520 | Author: caolei | Hits:

[VHDL-FPGA-Verilog] shifter

Description: 移位寄存器，可以串行输入，并行输入，串行输出-Shifter register which can
Platform: | Size: 1024 | Author: 吴传平 | Hits:

[VHDL-FPGA-Verilog] shifter

Description: vhdl,双向移位寄存器，实现置数，左移及右移操作-vhdl, bi-directional shift register to achieve set the number of left and right shift operation
Platform: | Size: 32768 | Author: 王晓虎 | Hits:

[VHDL-FPGA-Verilog] jincunqi

Description: VHDL语言实现的移位器，功能包括算术左移和右移，逻辑左移和右移，循环左移和右移。-VHDL language implementation of the shifter, left and right shift functions include arithmetic, logical left and shifted to the right, left and right shift cycle.
Platform: | Size: 285696 | Author: 吴越 | Hits:

[VHDL-FPGA-Verilog] Barrel_shifter

Description: verilog语言的桶形移位器，实验课上做的，大家别见笑-Barrel shifter
Platform: | Size: 3631104 | Author: zhangrongfei | Hits:

[VHDL-FPGA-Verilog] Move071221133_32

Description: 用Verilog HDL语言或VHDL语言来编写，实现32位的桶形移位器。 并在Quartus Ⅱ上实现模拟仿真；-With the Verilog HDL language or VHDL language to write to achieve 32-bit barrel shifter. To achieve in the Quartus Ⅱ simulation
Platform: | Size: 818176 | Author: 于伟 | Hits:

[VHDL-FPGA-Verilog] 3

Description: simple code based on verilog shifter , cla ,clg
Platform: | Size: 1024 | Author: Tera | Hits:

[VHDL-FPGA-Verilog] 5

Description: simple code based on verilog shifter , cla ,clg , ALU ,PC, decoder , tb_top
Platform: | Size: 16384 | Author: Tera | Hits:

[Embeded-SCM Develop] barrierShifter32bit071221136

Description: 用VHDL语言所书写的32位桶形移位器，在QuartusII中编译通过-Written in VHDL language using 32-bit barrel shifter, compiled by the QuartusII
Platform: | Size: 1800192 | Author: zdd | Hits:

[VHDL-FPGA-Verilog] SHIFTER

Description: SHIFTER描述移位寄存器的功能以及VHDL硬件语言的实现-SHIFTER describe the functions of the shift register and the realization of VHDL hardware language
Platform: | Size: 3072 | Author: SHEIN | Hits:

[VHDL-FPGA-Verilog] SHIFTER

Description: 使用VHDL语言编写的移位加法器，经过硬件实现通过-shifter
Platform: | Size: 146432 | Author: Saint Zhang | Hits:

[VHDL-FPGA-Verilog] attachments_15_02_2011.

Description: barrel shifter in vhdl coding
Platform: | Size: 1024 | Author: cdac | Hits:

[Software Engineering] barrael-shifter

Description: its barrel shifter in mentor graphis
Platform: | Size: 7168 | Author: sreenivasulu | Hits:
« 12 3 4 5 6 7 8 9 10 »

CodeBus www.codebus.net