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[Other resource] sine-1

Description: 这是正弦发生程序，用查表法实现正弦的产生。-occurred procedures, using look-up table method for the selection of sine wave.
Platform: | Size: 5873 | Author: 陈磊 | Hits:

[Windows Develop] sine

Description: Generating a sine wave by a recursive digital resonator
Platform: | Size: 1422 | Author: 心如止水 | Hits:

[Other resource] sine

Description: delphi画正弦曲线，抛砖引玉，发挥后可完成绘图的一些功能-delphi painting sine curve, something to play after the completion of some functional mapping
Platform: | Size: 134782 | Author: 曹国成 | Hits:

[Other resource] sine

Description: 用VerilogHDL实现的产生Sine波形全部程序 个人验证后收藏的。
Platform: | Size: 3567198 | Author: 孙浩 | Hits:

[Other resource] Generation of a Sine Wave Using a TMS320C54x Digit

Description: Generation of a Sine Wave Using a TMS320C54x Digital Signal Processor
Platform: | Size: 12550 | Author: 黄应东 | Hits:

[Windows Develop] sine

Description: Generating a sine wave by a recursive digital resonator
Platform: | Size: 1024 | Author: 心如止水 | Hits:

[DSP program] Generation of a Sine Wave Using a TMS320C54x Digit

Description: Generation of a Sine Wave Using a TMS320C54x Digital Signal Processor
Platform: | Size: 12288 | Author: 黄应东 | Hits:

[DSP program] sine-1

Description: 这是正弦发生程序，用查表法实现正弦的产生。-occurred procedures, using look-up table method for the selection of sine wave.
Platform: | Size: 16384 | Author: 陈磊 | Hits:

[Graph Drawing] sine

Description: delphi画正弦曲线，抛砖引玉，发挥后可完成绘图的一些功能-delphi painting sine curve, something to play after the completion of some functional mapping
Platform: | Size: 134144 | Author: 曹国成 | Hits:

[assembly language] sine

Description: 用verilog语言编的正弦波发生器，可以用QuartusII来打开这个源码，也可以转换成VHDL语言-Verilog language prepared by the sine wave generator can be used QuartusII to open the source code can also be converted into VHDL language
Platform: | Size: 104448 | Author: 雨孩 | Hits:

[VHDL-FPGA-Verilog] sine

Description: 用VerilogHDL实现的产生Sine波形全部程序 个人验证后收藏的。-VerilogHDL have achieved with Sine Waveform all procedures after the collection of personal authentication.
Platform: | Size: 3566592 | Author: 孙浩 | Hits:

[VHDL-FPGA-Verilog] sine

Description: chdl 64位计数器，利用mif格式文件产生正弦波。可以在fpga模拟正弦波-chdl 64 bit counter, using sine wave generated mif format. Sine wave can be simulated in FPGA
Platform: | Size: 268288 | Author: yyqdian | Hits:

[VHDL-FPGA-Verilog] daout-Sine-wave

Description: 正弦波的vhdl输出，使用VHDL编写的，已经通过调试-Sine wave output of the VHDL, the use of VHDL prepared already through debugging
Platform: | Size: 585728 | Author: zhang | Hits:

[Other] Sine

Description: 正弦波发生器，可以让大家学习正弦多种产生方法，可以设计具体电路-Sine wave generator, allowing them to learn the method for multiple sinusoidal, can design a specific circuit
Platform: | Size: 1028096 | Author: 秦寅 | Hits:

[SCM] Sine

Description: 主要实现在C8051F020的平台上完成在12864液晶OCMG4C8上画正弦函数特性曲线。-C8051F020 main platform in the completion of the painting OCMG4C8 LCD 12864 sine curve.
Platform: | Size: 38912 | Author: 冰雕火凤凰 | Hits:

[Other] four-parameter-sine-wave

Description: 论文四参数正弦波曲线拟合的快速算法，文中给出算法及算法实现程式-Papers four-parameter sine wave curve fitting of the fast algorithm, the text is given algorithm and algorithm programs
Platform: | Size: 247808 | Author: luckeey lee | Hits:

[Windows Develop] sine

Description: sine wave inverter schematic & code
Platform: | Size: 889856 | Author: swapan | Hits:

[VHDL-FPGA-Verilog] sine-generator

Description: ROM型正弦信号发生器，从rom中读取正弦波的点，循环输出，经AD生成波形，环境为quartus-sine generator in quartus
Platform: | Size: 677888 | Author: 张文 | Hits:

[VHDL-FPGA-Verilog] quartus2-Sine-generator

Description: quartus2设计正弦发生器 ,仿真出正弦波形-Sine generator design by quartus2
Platform: | Size: 876544 | Author: chen | Hits:

[Linux-Unix] sine.tar

Description: 按照配置选项，产生Microsoft Riff 格式的单频正弦波(According to the configuration option, a single frequency sine wave in the Microsoft Riff format is generated)
Platform: | Size: 3072 | Author: phoenixson | Hits:
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