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[VHDL-FPGA-Verilogsine_wave_generator_using_FPGA_implementation

Description: 该资料介绍了用FPGA实现正弦波发生器,原理是利用内置rom表,通过查询的方式实现输出,然后经过外部DAC输出,频率达到1MHz-The information on the sine wave generator using FPGA implementation, the principle is the use of built-in rom form, by querying the means to achieve the output, and then an external DAC output frequency of 1MHz
Platform: | Size: 2190336 | Author: 陈振林 | Hits:

[VHDL-FPGA-Verilogfpdpsk

Description: FSK/PSK信号调制器的VHDL程序,共分为分频器、m序列产生器、跳变检测、2:1数据选择器、正弦波信号产生器和DAC(数、模变换器)6部分-FSK/PSK signal modulator VHDL program is divided into divider, m sequence generator, transition detection, 2:1 data selector, the sine wave signal generator and DAC (number, mode converter) 6
Platform: | Size: 2048 | Author: hucy | Hits:

[VHDL-FPGA-VerilogSG_FPGA

Description: 2006年电子设计竞赛二等奖,多功能函数、信号发生器核心器件FPGA内部的原理图,主要模块用VHDL代码描述,包括PLL、相位累加器、波形算法和正弦波查找表,可实现0.005Hz~20MHz的多波形信号产生,频率步进值0.005,输出接100MSPS速率的DAC--AD9762-Electronic Design Competition 2006, second prize, multi-function signal generator within the core of the device schematic FPGA, VHDL code with the description of the main modules, including the PLL, phase accumulator, sine lookup table algorithm and the waveform can be realized 0.005Hz ~ 20MHz multi-waveform signal generator, the frequency step value of 0.005, then the output rate of 100MSPS DAC- AD9762
Platform: | Size: 1099776 | Author: zlz | Hits:

[VHDL-FPGA-Verilogsine-wave

Description: spartan-3an sine wave 波形通过dac显示 可改变sweep rate -spartan-3an sine wave based on VHDL
Platform: | Size: 1184768 | Author: BilleJoe | Hits:

[Other Embeded programsin

Description: 这是一个基于vhdl编写的正弦信号发生器,实现的功能为发生正弦波,给dac 0832采样-This is a sine signal generator based on VHDL code, realize the function of sine wave, give dac 0832 samples
Platform: | Size: 318464 | Author: 薛冰 | Hits:

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