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[Embeded-SCM Develop] SIN_fashengqi

Description: 2006altera大赛－基于软核Nios的宽谱正弦信号发生器设计：摘要：本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台，将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上，利用直接数字频率合成技术、数字调制技术实现所要求波形的产生，用 FPGA 中的 ROM 储存 DDS 所需的波形表，充分利用片上资源，提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理（DSP）技术，通过在 Nios 中软件编程解决 不同的调制方式的实现和选择。系统频率实现 1Hz～20MHz 可调，步进达到了1Hz；完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。 -2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I / O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
Platform: | Size: 407706 | Author: 刘斐 | Hits:

[Other resource] Embedded_system_design_based_SOPC

Description: SOPC是Altera公司提出的一种灵活、高效的片上系统设计方案,它可以有选择地将处理器、存储器、I/O等系统设计需要的组件集成到一个PLD器件上。在SOPC设计中可方便地加入用户自定义逻辑。该文简要介绍了SOPC设计架构,然后通过一个实例,详细介绍了嵌入式系统中SOPC设计的实现方法和效果。
Platform: | Size: 173045 | Author: 郑宏超 | Hits:

[Embeded-SCM Develop] at24c16_E2PROM

Description: 在NIOS中利用C语言模拟I2C总线时序，只需在NIOS的SOPCBUILDER中添加一双向口就可实现对E2PROM的读写，该程序简单实用-NIOS in the use of C language simulation I2C Bus Timing, only SOPCBUILDER NIOS adding a two-way I can be achieved right E2PROM literacy, the program is simple and practical
Platform: | Size: 1024 | Author: 大头鬼 | Hits:

[Embeded-SCM Develop] SIN_fashengqi

Description: 2006altera大赛－基于软核Nios的宽谱正弦信号发生器设计：摘要：本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台，将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上，利用直接数字频率合成技术、数字调制技术实现所要求波形的产生，用 FPGA 中的 ROM 储存 DDS 所需的波形表，充分利用片上资源，提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理（DSP）技术，通过在 Nios 中软件编程解决 不同的调制方式的实现和选择。系统频率实现 1Hz～20MHz 可调，步进达到了1Hz；完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。 -2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I/O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
Platform: | Size: 407552 | Author: 刘斐 | Hits:

[VHDL-FPGA-Verilog] DE2_SD_Card_Audio

Description: NIOSII,关于MP3的源代码,用SOPC+NIOSII平台开发的,可以运行,代码详细.大家放心使用,不懂可以问我.自己写的.-NIOSII, on the MP3 source code, using SOPC+ NIOSII platform, you can run the code in detail. Members can rest assured the use, you may ask, I do not know. Wrote it myself.
Platform: | Size: 1591296 | Author: 梁佳明 | Hits:

[Communication-Mobile] SOPCEDAjiangyi

Description: 有关sopc-eda的东西（讲义），相信对搞电子设计的，相当又帮助，希望大家多多共享-Sopc-eda-related things (notes), believe that engaging in electronic design, and quite another to help, I hope everyone a lot of sharing
Platform: | Size: 3725312 | Author: 王浩 | Hits:

[Software Engineering] Embedded_system_design_based_SOPC

Description: SOPC是Altera公司提出的一种灵活、高效的片上系统设计方案,它可以有选择地将处理器、存储器、I/O等系统设计需要的组件集成到一个PLD器件上。在SOPC设计中可方便地加入用户自定义逻辑。该文简要介绍了SOPC设计架构,然后通过一个实例,详细介绍了嵌入式系统中SOPC设计的实现方法和效果。-Altera Corporation SOPC is a flexible and efficient system-on-chip design, it can choose to have the processor, memory, I/O system design needs, such as components integrated into a PLD device. In SOPC design can be easily adding user-defined logic. The article briefly introduce the SOPC design framework, and then through an example of detailed SOPC embedded system design methods and results.
Platform: | Size: 173056 | Author: 郑宏超 | Hits:

[Embeded-SCM Develop] sopc_pdf

Description: 本人设计的nios最小系统 已经调试通过很有参考价值哟-I designed the smallest Nios system has been valuable debugging through yo
Platform: | Size: 57344 | Author: 刘国华 | Hits:

[VHDL-FPGA-Verilog] FPGA_jiaocheng_yu_shiyan

Description: 最重要的是七个从简单到复杂的实验，包括：基础实验一_FPGA_LED 基础实验二_seg7实验以及仿真 基础实验三_SOPC_LED 基础实验四_Flash烧写 基础实验五_定时器实验 基础实验六_按键以及PIO口中断实验 实验七_网卡使用 ，这些实验室用到了SOPC BUILDER 与NOIS ii ,使用Verilog 编写，有实验板和没有实验板的都可以用来学习。 其次还包括： FPGA开发板各存储器之间的联系、 多处理器文档 、 USB_UART等文档，很好用的文档，您下了相信不会后悔！-The most important thing is seven from simple to complex experiments, including: the basis of the experimental basis for a _FPGA_LED experiment II _seg7 the basis of experiment and simulation experiments based on three experiments _SOPC_LED programmer _Flash the basis of four experiments of five experiments _ timer six experimental basis _ keys, as well as experimental experimental PIO interrupt I _ 7 card use, these laboratories used the SOPC BUILDER with NOIS ii, the use of Verilog to prepare, there are no experimental test panels and plates can be used to learn. The second also includes: FPGA development board of the links between memory, multi-processor documents, USB_UART such as documents, useful documents, you will not regret it a sure!
Platform: | Size: 6065152 | Author: yuezhiying_007 | Hits:

[SCM] PWM

Description: 自己编写的PWM模块，通过SOPC和NIOSII IDE软件控制，控制DE2开发板上的小灯忽明忽暗-I have written the PWM module, through the SOPC and NIOSII IDE software control, control DE2 development board忽明忽暗small lamp
Platform: | Size: 8068096 | Author: hebei | Hits:

[VHDL-FPGA-Verilog] user_logic_Open_I2C

Description: 基于sopc系统的iic总线设计,提供关于片上系统的iic设计源代码及驱动-iic of system on programming chip
Platform: | Size: 12288 | Author: yly | Hits:

[VHDL-FPGA-Verilog] calculator

Description: 课设一个，又臭又长，是一个用verilog编写的计算器，对应革新科技的某个sopc开发平台，键盘会扫描，七段二极管会译码且是并行输出，上传的是整个工程，在该开发平台上基本正常，主程序段编写的较为幼稚，希望大家多多扔玉。注：主程序段预计做八位计算器，后来因为实验平台只有六个数码管无奈之下后两位没接，主程序中的ac有问题，在开发平台上没效果，压缩包里的图是主程序在quartus下的仿真图，开发环境是quartus，不知应选哪项。最后：初次上传欢迎指正 -Set up a class, but also smell and long, is a calculator written using verilog, corresponding to a sopc innovative science and technology development platform, the keyboard scan, seven-segment LED will be parallel decode and output, upload the entire project, In the normal development platform, the main program segment written in a more naive, I hope Members can throw jade. Note: The main program segment is expected to make eight calculators, and later because the experimental platform is only six digits after the two did not desperation then, the main program of the ac problems did not result in the development of platforms, compressed bag of Figure is the main program under the simulation diagram in quartus, development environment is quartus, do not know which of the election. Last: initial upload please correct me
Platform: | Size: 10809344 | Author: raven | Hits:

[VHDL-FPGA-Verilog] oc_i2c_master

Description: I 2 C 是两线双向的串行接口，非常适合芯片级的通讯。由于 SOPC Builder并未提供 I 2 C 内核， 本节所描述的 I 2 C 内核是 Richard Herveille 制作的并发布到网上去的免费核。 关于 I 2 C 核的使用方法，请见光盘中 oc_i2c_master文件夹下的使用说明.txt。 -I 2 C is a 2-line bidirectional serial interface, very suitable for chip-level communication. Because SOPC Builder does not provide I 2 C core, as described in this section I 2 C core is produced by Richard Herveille and publish to the web free of charge to go nuclear. With regard to I 2 C core to use, see the CD-ROM folder oc_i2c_master use instructions. Txt.
Platform: | Size: 260096 | Author: xuai | Hits:

[VHDL-FPGA-Verilog] Nios_II_I2C

Description: 本源码为Nios II的开发示例,主要演示Nios II的I2C总线设计。开发环境QuartusII。 本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of an example, the main demonstration Nios II I2C-bus design. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.
Platform: | Size: 13505536 | Author: huangshengqun | Hits:

[Program doc] sopc

Description: 这是一本关于SOPC相关知识的书籍，书中对FPGA设计、NIOSII 设计及调试做了详尽的说明，书中的例子我都调试通过了。对SOPC感兴趣的同仁可以看看。-This is a book about SOPC-related knowledge, books, books on FPGA design, NIOSII design and commissioning to do a detailed description of the book examples I have to debug passed. On the SOPC interested colleagues can look at.
Platform: | Size: 2181120 | Author: matlab | Hits:

[VHDL-FPGA-Verilog] lcd12864

Description: 在nios当中，用sopc，编写的12864测试程序，绝对不是抄写的，希望对大家有用-Among the nios with sopc, written in 12864 test procedures, is definitely not copying, I hope for all of us
Platform: | Size: 5525504 | Author: longjinfeng | Hits:

[Embeded-SCM Develop] E-Play-SOPC

Description: 1、软件使用 1）软件安装 2）简单设计的完整过程演示 2、FPGA核心板原理及资源介绍 3、E-PLAY扩展板HD7279占用I/O说明 E-PLAY扩展板LCD 128X32 & KEY 8占用I/O说明 4、Quartus II工程应用模块说明 -1, software 1) Software Installation 2) the integrity of the design process simple demo 2, FPGA core plate theory and resources introduced 3, E-PLAY expansion board HD7279 occupied I/O Description E-PLAY expansion board LCD 128X32 & KEY 8 occupation I/O note 4, Quartus II Application Module Description
Platform: | Size: 7530496 | Author: funny | Hits:

[VHDL-FPGA-Verilog] Verilog

Description: 基于FPGA的SOPC的学习教程，本人找了N久才找到的，希望能帮助到有需要的朋友-SOPC FPGA-based learning tutorial, I looked for a long time to find N, and intend to help a friend in need
Platform: | Size: 468992 | Author: Andy Lao | Hits:

[VHDL-FPGA-Verilog] glidelight

Description: sopc实现流水灯的程序，需要自行修改可用io口。-sopc program to achieve water lights, available io I need to modify.
Platform: | Size: 76800 | Author: zengdi | Hits:

[VHDL-FPGA-Verilog] UART

Description: 本代码用verilog语言配合sopc和nios实现了串口调试的目的。软件编程用C语言描述，只是比较简单的例子，适合初学者做了解用，本人亲自在EP2C8Q上实践。-The code to use verilog language sopc and nios achieved with serial debugging purposes. Software programming using C language description, but relatively simple example for beginners to do with understanding, I personally EP2C8Q on practice.
Platform: | Size: 17866752 | Author: 普尔 | Hits:

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