Search - spartan vhdl

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[VHDL-FPGA-Verilog] PCI_144 DL : 1: -- PCI Target Interface Design for XC73144 -- -- Synopsys VHDL Solution using Xilinx XC7000 Library --- PCI Target Interface Design for XC73144---- Synopsys VHDL Solution using Xilinx XC7000 Library
Update : 2025-02-17 Size : 3kb Publisher : processor
[VHDL-FPGA-Verilog] ProgramText DL : 0: we will use the Spartan3 XC3S200 FPGA to design a specified counter using the language VHDL.-we will use the cables Spartan3 FPGA design to a specified counter using the VHDL language.
Update : 2025-02-17 Size : 12kb Publisher : fei
[VHDL-FPGA-Verilog] S3Demo DL : 0: 用FPGA模拟VGA时序、模拟PS/2总线的键盘接口VHDL源代码，基于Xilinx spartan3-VGA FPGA timing simulation, simulation PS/2 keyboard interface bus VHDL source code, Based on Xilinx spartan3
Update : 2025-02-17 Size : 285kb Publisher : 计算机
[VHDL-FPGA-Verilog] Frequence_Generator DL : 0: xilinx提供的频率发生器的VHDL源码，可以运行在spartan3的学习开发板上。-xilinx the frequency generator VHDL source code, spartan3 can run in the learning development board.
Update : 2025-02-17 Size : 830kb Publisher : zhangjian
[VHDL-FPGA-Verilog] Xilinx_sparten3E_communication_between_key_board_a DL : 0: 在Xilinx Spartan-3E的开发板中，实现键盘和VGA显示器的通信的源代码，与大家分享：-In the Xilinx Spartan-3E development board, the realization of the keyboard and VGA display the source code of communication to share with you:
Update : 2025-02-17 Size : 2kb Publisher : lijq
[VHDL-FPGA-Verilog] ddr2sdram_spartan3s700an.tar DL : 0: It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit - Diligent fully working.-It is a first time code being developed to designers who want to get your DDR2 SDRAM on-board in Spartan 3AN Starter Kit- Diligent fully working.
Update : 2025-02-17 Size : 1.42mb Publisher : under
[Embeded-SCM Develop] RS232.VHDL DL : 0: RS232 Communication function in VHDL for Spartan 3E
Update : 2025-02-17 Size : 1kb Publisher : Tony Tan
[VHDL-FPGA-Verilog] Spartan-3E DL : 0: Spartan-3E 中文介绍（包括图解、功能介绍、使用方法、锁管脚等）-Spartan-3E Starter Kit Board User Guide
Update : 2025-02-17 Size : 9.03mb Publisher : weishangqing
[VHDL-FPGA-Verilog] eth_phy10 DL : 0: an ethernet physique sender. it s implemented with spartan 3E starter kit
Update : 2025-02-17 Size : 2kb Publisher : ramdane
[VHDL-FPGA-Verilog] Wiley.FPGA.Prototyping.by.VHDL.Examples.Xilinx.Sp DL : 1: Wiley,FPGA Prototyping by VHDL examples Spartan 3 version,Pong Chu,
Update : 2025-02-17 Size : 16.74mb Publisher : lefteris
[VHDL-FPGA-Verilog] s3esk DL : 1: spartan 3e开发板的实验例程，包括对应的说明文档-spartan 3e development board test routines, including the corresponding documentation
Update : 2025-02-17 Size : 32.74mb Publisher : aegis
[VHDL-FPGA-Verilog] s3esk_startup DL : 0: 利用kcpsm3控制lcd显示平台：ise 10.1， picoblaze， Spartan3e 开发板说明：综合按键和lcd、led的功能，思想简单，需要新技术，适合想在fpga方面深造的人。-using kcpsm3 for lcd display platform: ise 10.1， picoblaze， Spartan-3E FPGA Starter Kit Board comment: involve lcd/led/switch, simple mind but need up-to-date technics, suitable for who want to go deep in fpga development.
Update : 2025-02-17 Size : 1.06mb Publisher : kn
[Other] lcd DL : 0: Spartan-3e开发板的LCD屏幕上显示-Spartan-3e development board of the LCD screen
Update : 2025-02-17 Size : 308kb Publisher : 纪雪莲
[VHDL-FPGA-Verilog] usb_fpga_1_2_latest.tar DL : 0: USB2.0的FPGA内核，使其可以通过FPGA控制CY公司出品的CY7C68013USB微控制器，对USB设备进行读写操作。-• Xilinx Spartan-3 XC3S400 FPGA • High-Speed (480 MBit/s) USB interface via Mini-USB connector (B-type) • Cypress CY7C68013A/14A EZ-USB-Microcontroller • 60 General Purpose I/O s (GPIO): ◦ 52 FPGA GPIO s ◦ 8 EZ-USB FX2 GPIO s (4 if Flash option is installed)
Update : 2025-02-17 Size : 321kb Publisher : 赵恒
[VHDL-FPGA-Verilog] lcd_test DL : 0: Xilinx Spartan-3E实验板上基于verilog控制lcd屏幕A到Z反复轮转显示。-Xilinx Spartan-3E verilog based test control board lcd screen A to Z repeated rotary display.
Update : 2025-02-17 Size : 976kb Publisher : 陈海凯
[VHDL-FPGA-Verilog] 28538604-Spartan-3E-MATLAB-Interface-Documentatio DL : 0: Documentation VHDL communication RS-232 with the spartan 3
Update : 2025-02-17 Size : 306kb Publisher : JT_LADINO
[VHDL-FPGA-Verilog] DAC DL : 0: DAC spartan 3e starter
Update : 2025-02-17 Size : 1kb Publisher : Truong Toan
[VHDL-FPGA-Verilog] lcd DL : 0: SPARTAN 3E 开发板驱动程序 Verilog源码对于数字电路设计是很好的参考资料-SPARTAN 3E development board driver for digital circuit design, Verilog source code is a good reference
Update : 2025-02-17 Size : 2kb Publisher : wang
[VHDL-FPGA-Verilog] 3-8译码器VHDL描述 DL : 0: 在开发板FPGA：Spartan-3E 系列，型号：XC3S500E，封装：FGT320，速度-4；利用XIlinX编程，使用VHDL语言来描述组合逻辑器件3-8译码器(In the FPGA:Spartan-3E development board series, XC3S500E, FGT320, -4 package: speed; the use of XIlinX programming, using VHDL language to describe the combination of the 3-8 decoder logic device)
Update : 2025-02-17 Size : 10kb Publisher : lixilin
[VHDL-FPGA-Verilog] 按键去抖电路VHDL描述 DL : 0: 在开发板FPGA：Spartan-3E 系列，型号：XC3S500E，封装：FGT320，速度-4，利用Xilinx ISE软件，利用VHDL软件编写按键去抖电路，包含实验说明以及代码实现VHDL.doc文件,UCF管脚绑定文件(In the FPGA:Spartan-3E development board series, XC3S500E, package: FGT320, speed -4, using Xilinx ISE software, write the debounce circuit by using VHDL software, including experimental description and code to achieve the VHDL.doc file, the UCF pin binding file)
Update : 2025-02-17 Size : 29kb Publisher : lixilin

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