Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - stop watch using vhdl

Search list

[VHDL-FPGA-Verilog] stop_watch

Description: 采用Quartus2编写的电子秒表电路 实现计时、暂停等功能-Quartus2 prepared using electronic stopwatch timer circuit, suspension and other functions
Platform: | Size: 349184 | Author: gz208 | Hits:

[VHDL-FPGA-Verilog] Pld_lab4

Description: stop watch in vhdl using MAXII development board.
Platform: | Size: 1024 | Author: antish | Hits:

CodeBus www.codebus.net