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[VHDL-FPGA-Verilog] 串口verilog源代码

Description: 串口UARTverilog源代码。包括控制模块、收、发模块。程序全，功能简洁，包含Q2工程
Platform: | Size: 64207 | Author: huangjiajun1213 | Hits:

[Embeded-SCM Develop] uartverilog

Description: 8251的verilog 代码
Platform: | Size: 330206 | Author: JNCL521 | Hits:

[VHDL-FPGA-Verilog] uart_51

Description: 符合8051协议规范的UART的Verilog源代码.该压缩包是一个modelsim的工程.-8051 agreement in line with the norms of the Verilog source code UART. The Compression Pack is a ModelSim project.
Platform: | Size: 41984 | Author: 王亮 | Hits:

[VHDL-FPGA-Verilog] uartverilog

Description: xilinx提供的verilog_uart源码,适合做串口的人学习-Xilinx provided verilog_uart source, suitable for those who study serial
Platform: | Size: 9216 | Author: 伍迪 | Hits:

[Embeded-SCM Develop] uartverilog

Description: 实现cpld和pc机之间的串口通信，PC机传送到CPLD的信息，CPLD传回到PC机-Via verilog language ，cpld can communcate with pc.
Platform: | Size: 4096 | Author: 朱特 | Hits:

[Com Port] UARTverilog

Description: 用verilog语言实现的UART内核，可以直接拿来用。-it is writen by verilog，it is uart，it can use directly
Platform: | Size: 1752064 | Author: 张峰 | Hits:

[VHDL-FPGA-Verilog] 17869318fpga-example1

Description: FPGA实例包含UARTverilog TLC7524接口电路程序 TLC5510 VHDL控制程序 DAC0832 接口电路程序 LCD控制VHDL程序与仿真等-FPGA interface circuit examples include UARTverilog TLC7524 TLC5510 VHDL process control procedures procedures DAC0832 LCD control interface circuit and simulation of VHDL procedures and so on
Platform: | Size: 66560 | Author: yang | Hits:

[VHDL-FPGA-Verilog] uartverilog

Description: Verilog Uart经典实例，适合初学者练手，建议收藏-Verilog Uart classic example, training for beginners hand, the proposed collection of
Platform: | Size: 9216 | Author: dong | Hits:

[VHDL-FPGA-Verilog] uartverilog

Description: 该程序用VerilogHDL编写，主要用CPLD的EPM240T100C实现了RS-232的通信，供大家参考-VerilogHDL written by the program, mainly realized by CPLD' s EPM240T100C RS-232 communications for your reference
Platform: | Size: 311296 | Author: 王铭 | Hits:

[VHDL-FPGA-Verilog] uartverilog

Description: 这是基于BJ-EPM240学习开发板的串口通信实验程序-This study is based on BJ-EPM240 development board serial communication experiment program
Platform: | Size: 312320 | Author: cpu | Hits:

[VHDL-FPGA-Verilog] uartverilog

Description: 用verilog语言编写uart程序。模拟串口时序进行收发数据操作。-verilog uart
Platform: | Size: 313344 | Author: 一贯故 | Hits:

[VHDL-FPGA-Verilog] uartverilog

Description: RS232接口，有接收器和发送器和分频器，有详细说明-RS232 interface, a receiver and transmitter and the divider, a detailed description
Platform: | Size: 329728 | Author: 乘凉 | Hits:

[VHDL-FPGA-Verilog] uartverilog

Description: verilog hdl FPGA vga时序显示经典源程序很实用的-verilog hdl FPGA vga display timing source code very useful
Platform: | Size: 820224 | Author: 杨泽钰 | Hits:

[VHDL-FPGA-Verilog] uartverilog

Description: 该程序是Verilog写的串口收发程序，具有基本的收发功能，经过验证，能使初学者很好了解rs232，和Verilog-The program is written in Verilog serial transceiver program, with the basic send and receive functions, proven, good for beginners can understand rs232, and Verilog
Platform: | Size: 38912 | Author: 徐飞 | Hits:

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[VHDL-FPGA-Verilog] 串口verilog源代码

[Embeded-SCM Develop] uartverilog

[VHDL-FPGA-Verilog] uart_51

[VHDL-FPGA-Verilog] uartverilog

[Embeded-SCM Develop] uartverilog

[Com Port] UARTverilog

[VHDL-FPGA-Verilog] 17869318fpga-example1

[VHDL-FPGA-Verilog] uartverilog

[VHDL-FPGA-Verilog] uartverilog

[VHDL-FPGA-Verilog] uartverilog

[VHDL-FPGA-Verilog] uartverilog

[VHDL-FPGA-Verilog] uartverilog

[VHDL-FPGA-Verilog] uartverilog

[VHDL-FPGA-Verilog] uartverilog

[VHDL-FPGA-Verilog] uartverilog

[VHDL-FPGA-Verilog] uartverilog

[VHDL-FPGA-Verilog] uartverilog

[VHDL-FPGA-Verilog] uartverilog

[VHDL-FPGA-Verilog] uartverilog

[VHDL-FPGA-Verilog] uartverilog

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