Search - usb CPLD

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[Embeded-SCM Develop] CPLD-USB DL : 0: 基于CPLD的USB下载电缆设计.rar-CPLD-based design USB download cable. Rar
Date : 2008-10-13 Size : 249.37kb User : 徐钧
[USB develop] usb DL : 2: 使用68013的测试程序，包含68013固件程序（采用slave FIFO bulk同步读写，EP2 OUT，EP6 IN），驱动，PC端测试用程序。CPLD的VHDL代码
Date : 2008-10-13 Size : 988.73kb User : 李华
[Embeded-SCM Develop] JTAG仿真器CPLD DL : 0: JTAG仿真器CPLD -JTAG Emulator CPLD
Date : 2025-07-09 Size : 337kb User : 李秉
[VHDL-FPGA-Verilog] cpld DL : 0: cpld与单片机接口设计,利于电子设计及应用- Interface design between microprocessor and cpld ,suit for IC design and application
Date : 2025-07-09 Size : 8kb User : 宋健
[VHDL-FPGA-Verilog] CPLD_DMA DL : 0: 这是一款USB接口ISP1582器件实现DMA传输的辅助电路的硬件设计源代码-This is a ISP1582 USB device DMA transmission of the auxiliary circuit hardware design source code
Date : 2025-07-09 Size : 5kb User : 张国梁
[Embeded-SCM Develop] LA_USB DL : 0: Date : 2025-07-09 Size : 952kb User : nicai
[VHDL-FPGA-Verilog] usb_cpld_code DL : 0: usb_cpld_code.zip usbjtag - Variations on the implementation of a USB JTAG adapter.-usb_cpld_code.zip usbjtag-o Variations n the implementation of a USB JTAG adapter.
Date : 2025-07-09 Size : 26kb User : david
[Embeded-SCM Develop] dlwdsjcjxt DL : 0: 本文介基于CPLD和USB的多路温度数据采集系统-paper-based CPLD and USB multi-channel temperature data acquisition system
Date : 2025-07-09 Size : 101kb User : 萧墙
[VHDL-FPGA-Verilog] usb_jtag-20070128-1751 DL : 0: 网上流传的usb_blaster原理图里的CPLD源码,主要是实现usb时序转换成JATG时序输出！-spreading online usb_blaster tenets of the CPLD Ituri source, usb key is timing converted into JATG sequential output!
Date : 2025-07-09 Size : 51kb User : 冯海
[Embeded-SCM Develop] CPLDUSB20 DL : 0: CPLD在USB20接口中的应用，usb大家都用过吧，不用多说了吧。-CPLD in USB20 interface, the application usb everyone it has been used, among other things, that instead.
Date : 2025-07-09 Size : 9kb User : 丁明
[Embeded-SCM Develop] zlgusb DL : 0: 周立功的USB大容量存储开发板带CPLD的代码D的源码-weeks meritorious USB Mass Storage Development strip CPLD the source code D.
Date : 2025-07-09 Size : 422kb User : guoyaoming
[Embeded-SCM Develop] CPLD-USB DL : 0: 基于CPLD的USB下载电缆设计.rar-CPLD-based design USB download cable. Rar
Date : 2025-07-09 Size : 249kb User : 徐钧
[Other Embeded program] altera_USB_blaste DL : 0: altera USB blaste 制作全套资料。包括原理图、93LC46的配置文件和CPLD的VHDL源程序。-altera USB blaste produced full set of information. Including drawings, 93LC46 configuration files and CPLD VHDL source.
Date : 2025-07-09 Size : 134kb User : xuphone
[SCM] UsbBlaster DL : 0: 直接应用USB接口，对FPGA/CPLD等芯片的下载。便于用手提电脑的玩家使用。大家可以里面有单片机的源程序和PLD的下载程序。-Direct application of USB interface on the FPGA/CPLD chip, such as downloads. Easy to use laptop computers to use the player. Everyone can have MCU inside and PLD source of the download process.
Date : 2025-07-09 Size : 21kb User : feng
[Software Engineering] 000011111 DL : 0: 介绍了外置式USB无损图像采集卡的设计和实现方案，它用于特殊场合的图像处理及其相关领域。针对图像传输的特点，结合FPGA/CPLD和USB技术，给出了硬件实现框图，同时给出了FPGA/CPLD内部时序控制图和USB程序流程图，结合框图和部分程序源代码，具体讲述了课题中遇到的难点和相应的解决方案。 -External USB introduce a non-destructive image acquisition card design and implementation of the program, and it is used for special occasions image processing and its related fields. For image transmission characteristics, combined with FPGA/CPLD and USB technology, hardware implementation block diagram is given, at the same time gives the FPGA/CPLD Internal Timing Control charts and USB program flowchart, diagram, and some combination of source code, specifically about the topic Difficulties encountered and the corresponding solutions.
Date : 2025-07-09 Size : 137kb User : 兰升
[Other Embeded program] USB20CTest_CpldCode DL : 0: maxplusII开发平台，适用于不是很熟悉USB上层开发的技术人员，可以快速开发出高速USB的DMA传输-maxplusII development platform for the top is not very familiar with the USB technology developed by staff, can quickly develop a high-speed USB transmission of the DMA
Date : 2025-07-09 Size : 127kb User : 洪炉
[Embeded-SCM Develop] hgz_new DL : 0: 核共振数据采集PCB，实际pcb，布线应该水平还ok得，为51的核和cpld结合，含usb通信。-Nuclear resonance data acquisition PCB, the actual pcb, wiring should be ok too level for the 51 nuclear and CPLD combination with usb communications.
Date : 2025-07-09 Size : 389kb User :
[USB develop] usb DL : 0: 使用68013的测试程序，包含68013固件程序（采用slave FIFO bulk同步读写，EP2 OUT，EP6 IN），驱动，PC端测试用程序。CPLD的VHDL代码-Test procedures for the use of 68,013, including 68,013 firmware (using the synchronous slave FIFO bulk read and write, EP2 OUT, EP6 IN), driver, PC-side test procedures. VHDL code of CPLD
Date : 2025-07-09 Size : 4.51mb User : 李华
[USB develop] CPLD_USB DL : 0: ：CPLD 可编程技术具有功能集成度高、设计灵活、开发周期短、成本低等特点。介绍基于ATMEL 公司的CPLD 芯片ATF1508AS 设计的串并转换和高速 USB 及其在高速高精度数据采集系统中的应用-: CPLD programmable technology with a high degree of functional integration, design flexibility, short development cycle, and low cost. ATMEL-based company introduced the CPLD chip ATF1508AS SERDES design and high-speed USB and its application in high-speed high-precision data acquisition system
Date : 2025-07-09 Size : 182kb User : 简单
[VHDL-FPGA-Verilog] CPLD文件 DL : 0: USB_BLASTER的CPLD文件，已编译好，直接烧录即可(USB Blaster for the Altera Corporation)
Date : 2025-07-09 Size : 1kb User : HUAKEEN

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