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[Other Embeded programusbhostslave

Description:
Platform: | Size: 500736 | Author: 张雷 | Hits:

[VHDL-FPGA-Verilogbfm

Description: Verilog HDL编写的总线功能模型,十分有用,需要的下载-Verilog HDL prepared by the bus functional model is useful, it needs to download
Platform: | Size: 2048 | Author: wyl | Hits:

[VHDL-FPGA-Verilogusb_verilog.tar

Description: 文件包含一个usb 专用集成电路设计项目,用的verilog 原码-document contains a usb ASIC design, the original code verilog
Platform: | Size: 197632 | Author: jockeyhao | Hits:

[VHDL-FPGA-VerilogFT245_R_W

Description: USB芯片FT245BM读写代码,在Quartus II V7.2上测试成功!---Verilog语言.
Platform: | Size: 1644544 | Author: | Hits:

[USB developusbfree_core

Description: 完整的usb freecore,全部用verilog编写-Complete usb freecore, all prepared with Verilog
Platform: | Size: 60416 | Author: 王天 | Hits:

[USB developusb_funct

Description: usb2.0的Verilog源代码,包含完整的源代码,没有测试激励文件-USB2.0 the Verilog source code, including complete source code, there is no incentive to test document
Platform: | Size: 212992 | Author: 高杰 | Hits:

[Otherusb1.1

Description: USB 1.1的verilog代码,已通过fpga验证-USB 1.1 in Verilog code, has passed through FPGA verification
Platform: | Size: 63488 | Author: zys | Hits:

[VHDL-FPGA-Verilogusb11

Description: 基于verilog HDL的一个USB 1.1的IP 核,内有详细文档说明。-Verilog HDL based on a USB 1.1 of the IP core, which has detailed documentation.
Platform: | Size: 414720 | Author: 戴求淼 | Hits:

[VHDL-FPGA-Veriloguart_tx_rx

Description: 该工程用verilog编写,已通过串口调试助手调试通过,接收模块采用8倍波特率采样数据,有较好的滤波功能,在PC上完成自发自收功能。-Verilog prepared by the project, has passed through the serial debug debugging assistant, receiving 8 times the baud rate module sampling data, a better filtering in the PC to complete the voluntary self-close feature.
Platform: | Size: 1312768 | Author: eric | Hits:

[VHDL-FPGA-VerilogFPGA_cy7c68013

Description: 本工程包括FPGA程序和CY7C68013固件程序。 上位机程序通过EZ-USB CONTROL PANNEL 来测试。-The works include the FPGA programs and CY7C68013 firmware. Host computer procedure EZ-USB CONTROL PANNEL to test.
Platform: | Size: 5125120 | Author: zhaox | Hits:

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