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[Other] USB11112

Description: USB的vhdl代码，具有很强的指导意义，对FPGA进行usb控制很有帮助！-USB vhdl code, which is of great guiding significance. the FPGA control usb helpful!
Platform: | Size: 140480 | Author: 温暖感 | Hits:

[VHDL-FPGA-Verilog] USB 1.1 IP-CORE和设计范例 VHDL源代码

Description: USB 1.1 IP-CORE和设计范例 VHDL源代码-Sample program for USB1.1 IP core design, VHDL source code
Platform: | Size: 425984 | Author: ken | Hits:

[VHDL-FPGA-Verilog] USB接口控制器参考设计_xilinx提供_vhdl

Description: USB接口控制器参考设计，xilinx提供的VHDL源代码-USB interface controller reference design for Xilinx VHDL source code
Platform: | Size: 460800 | Author: 陈旭 | Hits:

[USB develop] Usb_RTL(VHDL_Verilog)

Description: USBRTL电路的VHDL和Verilog代码-USBRTL Circuit VHDL and Verilog code
Platform: | Size: 268288 | Author: 戴鹏 | Hits:

[VHDL-FPGA-Verilog] USBXilinx

Description: 实现了串行通信接口的全部功能，符合RS-232-C标准的完整UART模块源代码，中文注解，清晰易懂，经过严格仿真测试，绝对好用。-a serial communication interface of all functions, with RS-232-C standard UART modules complete source code, Chinese notes, lucid, after a rigorous simulation tests, absolutely useful.
Platform: | Size: 462848 | Author: 张海 | Hits:

[USB develop] usbvhdl

Description: usb 代码 用VHDL编写 方便初学者使用 学习 有什么不明白的 大家可以回复 互相交流-usb using VHDL code to facilitate the preparation of beginners to learn what we do not understand each other can return exchange
Platform: | Size: 3072 | Author: 和尚 | Hits:

[ELanguage] usb_funct

Description: USB接口的VHDL源码，支持Verilog HDL程序-USB VHDL source code, supports Verilog HDL procedures
Platform: | Size: 230400 | Author: 王森 | Hits:

[VHDL-FPGA-Verilog] USB11112

Description: USB的vhdl代码，具有很强的指导意义，对FPGA进行usb控制很有帮助！-USB vhdl code, which is of great guiding significance. the FPGA control usb helpful!
Platform: | Size: 140288 | Author: 温暖感 | Hits:

[VHDL-FPGA-Verilog] USB_VHDL_CODE

Description: USB接口控制器参考设计VHDL代码,方便开发FPGA人员进行USB的开发，是一个不错的源码。-USB interface controller reference design VHDL code, facilitate the development of FPGA personnel USB development, is a good source.
Platform: | Size: 60416 | Author: hyl | Hits:

[VHDL-FPGA-Verilog] usb_xilinx_vhdl

Description: usb源码_xilinx_vhdl 这是Xilinx FPGA上的usb源码（VHDL)-usb-source _xilinx_vhdl This is a Xilinx FPGA on the usb source code (VHDL)
Platform: | Size: 56320 | Author: nanotalk | Hits:

[USB develop] USB

Description: fpga设计的usb接口源程序，欢迎指导-FPGA design usb interface source code, welcomed the guidance of
Platform: | Size: 140288 | Author: 陈楠 | Hits:

[USB develop] usb

Description: 使用68013的测试程序，包含68013固件程序（采用slave FIFO bulk同步读写，EP2 OUT，EP6 IN），驱动，PC端测试用程序。CPLD的VHDL代码-Test procedures for the use of 68,013, including 68,013 firmware (using the synchronous slave FIFO bulk read and write, EP2 OUT, EP6 IN), driver, PC-side test procedures. VHDL code of CPLD
Platform: | Size: 4731904 | Author: 李华 | Hits:

[VHDL-FPGA-Verilog] USB

Description: USB源代码，基于VHDL语言编写，在QuartusII上面已验证其功能-USB source code, based on the VHDL language, verified in QuartusII above its function
Platform: | Size: 5120 | Author: 周 | Hits:

[SCM] source_code

Description: 一些源程序，主要包括CAN总线驱动、sdram VHDL实现、ucos2的移植、SDIO驱动、tcpip的实现、usb控制器代码、基于FPGA的雷达目标模拟器等-Some source code, including CAN bus driver, sdram VHDL implementation, ucos2 transplant, SDIO drivers, tcpip of implementation, usb controller code, based on the FPGA, such as radar target simulator
Platform: | Size: 6898688 | Author: 磊 | Hits:

[VHDL-FPGA-Verilog] USB

Description: USB通信协议的硬件描述语言代码，用于FPGA的总线接口控制器开发-USB communication protocol of the hardware description language code for the FPGA bus interface controller development
Platform: | Size: 140288 | Author: shigengxin | Hits:

[Other] vhdl

Description: usb rtl code, to fpga or asic
Platform: | Size: 156672 | Author: andy | Hits:

[USB develop] ebook_USB2.0_intel_tranceiver

Description: High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 MHz. With USB 2.0 signaling running at hundreds of MHz, the existing design methodology must change.
Platform: | Size: 342016 | Author: rex | Hits:

[VHDL-FPGA-Verilog] USB

Description: USB的VHDL实现源码（使用VHDL硬件描述语言，通过Altera QuartusII 开发）-USB to achieve the VHDL source code (using VHDL hardware description language, through the development of Altera QuartusII)
Platform: | Size: 50176 | Author: 刘磊 | Hits:

[VHDL-FPGA-Verilog] PDC-9022-A

Description: cy68013 vhdl code and usb high speed
Platform: | Size: 450560 | Author: namushin | Hits:

[VHDL-FPGA-Verilog] USB

Description: 用VHDL编写实现的USB接口控制器源码，自带testbench，解压后用ISE打开工程文件即可。-Prepared with the VHDL source code to achieve the USB interface controller, bring their own testbench, after decompression project file can be opened with the ISE.
Platform: | Size: 156672 | Author: 陈阳 | Hits:
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