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[VHDL-FPGA-Verilog] alu

Description: verilog编写的alu模块-Verilog modules prepared by the ALU
Platform: | Size: 1024 | Author: 刘陆陆 | Hits:

[VHDL-FPGA-Verilog] verilog实现ALU的源代码

Description: verilog实现ALU的源代码，并提供了一个详细的测试平台！-achieve ALU Verilog source code, and provide a detailed test platform!
Platform: | Size: 1024 | Author: 飞扬 | Hits:

[ARM-PowerPC-ColdFire-MIPS] signal_cpu_sort

Description: Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.-Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_MEMORY, REGISTER, PC, and TESTBRANCH.
Platform: | Size: 8192 | Author: 張大小 | Hits:

[VHDL-FPGA-Verilog] verilog实例

Description: 一些很实用的verilog源程序，是初学者的好棒手，希望能给需要的人一点帮助，请支持一下。-some very practical Verilog source is the beginners excellent hands, in hopes of giving those who need a bit of help, please support what.
Platform: | Size: 165888 | Author: 叶若寒 | Hits:

[VHDL-FPGA-Verilog] alu_32_bit

Description: verilog 32-bit ALU-verilog 32-bit ALU
Platform: | Size: 2048 | Author: qwasqwas | Hits:

[ARM-PowerPC-ColdFire-MIPS] verilog

Description: 8bit alu use verilog hdl
Platform: | Size: 8192 | Author: 周微微 | Hits:

[VHDL-FPGA-Verilog] ALU

Description: 用verilog编写的32位alu部件，用于cpu制作-Prepared using Verilog 32 alu parts, used cpu production
Platform: | Size: 3072 | Author: 胡豫陇 | Hits:

[ARM-PowerPC-ColdFire-MIPS] ALU

Description: 用verilog编写的4位ALU，由算术运算模块、逻辑运算模块、选择模块组成-Verilog prepared with 4 ALU, arithmetic operations by the module, logic operations module, select modules
Platform: | Size: 3072 | Author: 姚伟 | Hits:

[MiddleWare] ALU

Description: 用VERILOG实现ALU，实现各种算术运算，逻辑运算，移位运算等-Realize using Verilog ALU, realize a variety of arithmetic operations, logic operations, shift operations, etc.
Platform: | Size: 1725440 | Author: 刘自强 | Hits:

[VHDL-FPGA-Verilog] alu

Description: 16位RISC CPU的ALU，使用VHDL编写-16-bit RISC CPU
Platform: | Size: 2048 | Author: 李斌 | Hits:

[VHDL-FPGA-Verilog] alu

Description: 4bit ALU（运算逻辑单元）的设计 给出了此次设计alu的输入输出结构及相应的位数。其中C0是一位的进位输入，A和B分别是4位的数据输入，S0、S1、M分别为一位的功能选择输入信号；Cout是一位的进位输出，F是4为的运算结果输出。-4bit ALU (arithmetic logic unit) design is given in the design of alu input and output structure and the corresponding median. C0 which is a binary input of, A and B are four data entry, S0, S1, M, respectively, as a function of choice of the input signal Cout of a binary output, F is 4 for computing the results of output.
Platform: | Size: 1024 | Author: chenyi | Hits:

[VHDL-FPGA-Verilog] ALU

Description: vhdl代码 使用quartus编译 cpu中 alu的设计 可作为课程设计的参考 此为16的运算器-VHDL code using Quartus compiler cpu in alu design of curriculum design can be used as a reference for this for 16 computing device
Platform: | Size: 1024 | Author: 闵瑞鑫 | Hits:

[VHDL-FPGA-Verilog] alu

Description: 设计带进位算术逻辑运算单元，根据74LS181功能表，用Verilog HDL硬件描述语言编程实现ALU181的算术逻辑运算功能，编辑实验原理图，在算术逻辑单元原理图上，将其扩展为带进位的算术逻辑运算单元，对其进行编译，并设计波形对其进行仿真验证，最后下载验证-Design into the digital arithmetic logic operation unit, in accordance with menu 74LS181 with Verilog HDL hardware description language programming ALU181 function arithmetic logic operations, editing Experimental schematic diagram, in the Arithmetic Logic Unit schematic diagram on its expansion into the spaces for arithmetic logic operation unit, its compiler, and the design of their simulation waveforms, and finally download the verification
Platform: | Size: 667648 | Author: 623902748 | Hits:

[VHDL-FPGA-Verilog] alu

Description: 加法器FPGA 实现，精简，快速，高效，有仿真文件-adder base on FPGA ，verilog HDL
Platform: | Size: 1024 | Author: lijiaming | Hits:

[VHDL-FPGA-Verilog] ALU

Description: ALU logic using Verilog
Platform: | Size: 1024 | Author: Cho Hyun Woo | Hits:

[Other] alu

Description: ALU modeling verilog codes and testbench
Platform: | Size: 545792 | Author: neorome | Hits:

[VHDL-FPGA-Verilog] ALU

Description: a simple 4 bit alu in verilog
Platform: | Size: 612352 | Author: priya | Hits:

[VHDL-FPGA-Verilog] alu

Description: arithmetical-logic unit design in Verilog
Platform: | Size: 1024 | Author: Iuliana, Chiuchisan | Hits:

[VHDL-FPGA-Verilog] ALU

Description: verilog硬件仿真，实现32-bit RISC微处理器的算数逻辑单仿真元(ALU),实现加减运算、逻辑运算、移位运算。仿真级别为RTL级。-verilog hardware simulation, to achieve 32-bit RISC microprocessor arithmetic logic one simulation element (ALU), to achieve addition and subtraction operations, logic operations, shift operations. RTL-level simulation level.
Platform: | Size: 3072 | Author: | Hits:

[VHDL-FPGA-Verilog] alu

Description: the 8 bit alu by verilog
Platform: | Size: 91136 | Author: pedram | Hits:
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