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[Embeded-SCM Develop] BIN2BCD

Description: 10进制to BCD转换算法-Decimal to BCD conversion algorithm
Platform: | Size: 1024 | Author: 好 | Hits:

[SCM] bcd_conv

Description: convert.asm: 1.From ASCII resp. BCD to binary 2.From binary to ASCII resp. BCD 3.From binary to Hex-ASCII Bin_Bcd.c: uchar BcdToBin(uchar val) uchar BinToBcd(uchar val) -convert.asm : 1.From ASCII resp. BCD 2.From binary to binary t o ASCII resp. BCD 3.From binary to Hex-ASCII Bin _Bcd.c : uchar BcdToBin (uchar val) uchar BinToBcd (uch ar val)
Platform: | Size: 5120 | Author: jack | Hits:

[Other Embeded program] counter_7seg

Description: 带分频器的bcd计数电路设计，verilog源码-dividers with the bcd count circuit design, Verilog source
Platform: | Size: 292864 | Author: 倪璠 | Hits:

[Other] BCD-int

Description: BCD码和16/32位有符号以及无符号整型数之间的转换-BCD and 16/32 bits signed and unsigned integer conversion between the
Platform: | Size: 1024 | Author: huhc | Hits:

[Static control] clock2001

Description: 时钟模块之一：二进制转BCD码verilog源代码FPGA advantage编程环境-clock module : BCD switch binary source code Verilog FPGA advantage programming environment
Platform: | Size: 1024 | Author: dandan | Hits:

[VHDL-FPGA-Verilog] 9.2_LCD_PULSE

Description: 基于Verilog-HDL的硬件电路的实现 9.2 具有LCD显示单元的可编程单脉冲发生器 　　9.2.1 LCD显示单元的工作原理 　　9.2.2 显示逻辑设计的思路与流程 　　9.2.3 LCD显示单元的硬件实现 　　9.2.4 可编程单脉冲数据的BCD码化 　　9.2.5 task的使用方法 　　9.2.6 for循环语句的使用方法 　　9.2.7 二进制数转换BCD码的硬件实现 　　9.2.8 可编程单脉冲发生器与显示单元的接口 　　9.2.9 具有LCD显示单元的可编程单脉冲发生器的硬件实现 　　9.2.10 编译指令-"文件包含"处理的使用方法 -based on Verilog-HDL hardware Circuit of 9.2 LCD display module with the series Single-Pulse Generator 9.2.1 LCD display module Principle 9.2.2 shows the logic design Thinking and Process 9.2.3 LCD display module hardware 9.2.4 programmable single pulse data BCD of the task 9.2.5 9.2.6 for the use of the phrase cycle use 9.2.7 binary conversion of BCD programmable hardware 9.2.8 single pulse generator with a said unit 9.2.9 interface with the LCD display module programmable pulse generator hardware 9 .2.10 compiler directives- "document includes" the use of
Platform: | Size: 5120 | Author: 宁宁 | Hits:

[VHDL-FPGA-Verilog] freqm

Description: a simple implementation of a frequency meter with the BCD-counter and the 7-segment LED display
Platform: | Size: 12288 | Author: wangfeng | Hits:

[VHDL-FPGA-Verilog] Bin16_BCD5

Description: it is a binary16 to BCD converter .it will work on spartan 3 xilini devices.
Platform: | Size: 1024 | Author: ali | Hits:

[Windows Develop] bcd

Description: vhdl编写的将二进制转BCD码的程序.直接源代码，适合新手编程，语法学习-BCD
Platform: | Size: 202752 | Author: yjh | Hits:

[VHDL-FPGA-Verilog] 7-segment

Description: VHDL Design of BCD to 7-segment decoder using PROM
Platform: | Size: 60416 | Author: FATIMA | Hits:

[VHDL-FPGA-Verilog] Binary_to_BCD_Converter

Description: General Binary-to-BCD Converter The linked code is a general binary-to-BCD Verilog module, and I have personally tested the code.
Platform: | Size: 25600 | Author: volkan | Hits:

[VHDL-FPGA-Verilog] bcd_adder

Description: verilog code for bcd adder
Platform: | Size: 10240 | Author: sandeep | Hits:

[VHDL-FPGA-Verilog] bcd

Description: 4位bcd码加法器的verilog代码 -4 bit bcdadder verilog4 bit bcdadder verilog
Platform: | Size: 3072 | Author: 严迪超 | Hits:

[Software Engineering] bai2

Description: excercises verilog add two bcd numbers
Platform: | Size: 2287616 | Author: atula136 | Hits:

[VHDL-FPGA-Verilog] verilog_program

Description: 各种初学Verilog者需要练习的实例代码集锦，包含加法器，BCD计数器，2分频，交通灯等等！-Beginners need to practice a variety of examples of Verilog code highlights, including the adder, BCD counters, 2 frequency, traffic lights and more!
Platform: | Size: 32768 | Author: lyh | Hits:

[VHDL-FPGA-Verilog] bcd_to_binary

Description: bcd to binary verilog
Platform: | Size: 4096 | Author: hyuma | Hits:

[VHDL-FPGA-Verilog] BCD

Description: BCD码减法实现程序，非常完整，采用Verilog HDL语言实现。-BCD subtraction to achieve program code, very complete, using Verilog HDL language.
Platform: | Size: 155648 | Author: 江浩 | Hits:

[VHDL-FPGA-Verilog] bcd counter

Description: Binary counter design in verilog
Platform: | Size: 176128 | Author: Armaghan | Hits:

[Embeded-SCM Develop] 4位BCD计数器

Description: 用Verilog语言编程实现4位BCD计数器的功能(Write the programm with Verilog language to implement the function of 4 - bit BCD counter.)
Platform: | Size: 25600 | Author: limaozi | Hits:

[assembly language] Verilog源代码

Description: 多种基本功能的Verilog代码实现，包括多路选择器，二进制到BCD码转换，二进制到格雷码转换，7段译码器，8位数据锁存器，移位寄存器等等多种功能。(Verilog code implementation of a variety of basic functions, including multiplexer, binary to BCD code conversion, binary to Gray code conversion, 7-segment decoder, 8-bit data latch, shift register and many other functions.)
Platform: | Size: 18432 | Author: MMK1 | Hits:
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