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[Data structs] BCH

Description: 一个解码的类，常用在条形码的解码中，是老外写的比较实用-a decoder category, commonly used in bar code decoding, the foreigner is more practical writing
Platform: | Size: 3072 | Author: 刘怀国 | Hits:

[VHDL-FPGA-Verilog] bch_encoder_decoder

Description: bch encoder+decoder 源代码，Flash控制器，通讯都需要用到哦-bch encoder+ decoder source code, Flash controller, communications are needed Oh
Platform: | Size: 136192 | Author: linchan | Hits:

[Communication-Mobile] decoder

Description: 用verilog编写的bch译码器，包括测试文件，随机加载了比特流，进行了测试。-Prepared using Verilog BCH decoder, including test papers, random load the bit stream to carry out the test.
Platform: | Size: 357376 | Author: 牛顿 | Hits:

[Documents] BCH

Description: 有效的并行编码器对于长BCH编码的 大家放心 真的号死后和很好评的-Area efficient parallel decoder architecture for long BCH codes
Platform: | Size: 158720 | Author: 王喜爱 | Hits:

[VHDL-FPGA-Verilog] viterbi_for_bch

Description: Viterbi based trellis decoder for (7,4) - binary BCH code-Viterbi based trellis decoder for (7,4)- binary BCH code
Platform: | Size: 1024 | Author: shahifaqeer | Hits:

[3G develop] BCH_dec_verilog

Description: BCH decoder based on Verilog design
Platform: | Size: 45056 | Author: snowman | Hits:

[VHDL-FPGA-Verilog] bch_dec_enc_dcd

Description: 关于BCH的编码器和译码器，可实现16位，32位，64位，128位的编码和译码纠错，2位纠错，Verilog实现-On the BCH encoder and decoder, can achieve 16-bit, 32-bit, 64-bit, 128-bit encoding and decoding error correction, 2-bit error correction, Verilog implementation
Platform: | Size: 1096704 | Author: 小小 | Hits:

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