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[VHDL-FPGA-VerilogCAN协议控制器的Verilog实现

Description: CAN协议控制器的Verilog实现
Platform: | Size: 38781 | Author: belong2568@163.com | Hits:

[Embeded-SCM Developverilog实例 [43项]

Description: 嵌入式可编程器件CPLD的典型实例 压缩包,共计43个源码文件。 使用ALTERA的 Muxplus 软件即可编辑仿真 相关软件可在教育网ftp下载[天网查询,有很多站点提供]-Embedded Programmable CPLD in a typical example of compressed, for a total of 43 source document. Altera Muxplus use the software can edit simulation software available from the Education Network ftp download [days Web inquiries, many sites provide]
Platform: | Size: 181248 | Author: 吴旭辉 | Hits:

[VHDL-FPGA-Verilog能综合的YCrCb2RGB模块(verilog)_采用3级流水线

Description: 能综合的YCrCb2RGB模块(verilog)_采用3级流水线,用fpga做小数运算,还有就是流水线技术 -can YCrCb2RGB integrated module (Verilog) _ used three lines, they simply do with fractional arithmetic, there is pipelining technology
Platform: | Size: 1024 | Author: 于飞 | Hits:

[Communicationverilog for uart

Description: 通用异步接收器/发送器(UART)是能够编程以控制计算机到附加串行设备的接口的微芯片。详细来说,它提供给计算机RS-...还有高级的UART提供了一定数量的数据缓冲,这样计算机和串行设备数据流就可以保持同样的速度。-universal asynchronous receiver/transmitter (UART) can be programmed to control computer attached to the serial device interface microchips. Details, provide it to the computer RS-High ... UART also provide a certain number of data buffer, computer equipment and serial data stream can maintain the same speed.
Platform: | Size: 9216 | Author: 李志 | Hits:

[Other Embeded programCAN协议控制器的Verilog实现

Description: 基于FPGA的CAN总线控制器,VERILOGHDL源代码,Q2仿真实现。可用。-FPGA-based CAN Bus Controller, VERILOGHDL source code, Q2 Simulation. Available.
Platform: | Size: 38912 | Author: wl | Hits:

[OtherVerilog-r2-wangzhengxiong

Description: 学些verilog语言的入门书籍,由汪正雄编写,内容挺全的,可以作为初学者的手册。-up some Verilog language entry books, prepared by Hongzhengxiong, as Ting-wide and can serve as a beginner's manual.
Platform: | Size: 401408 | Author: | Hits:

[Compress-Decompress algrithmscanbus(FPGA)

Description: 基于FPGA的can 总线设计,采用verilog语言编写。在FPGA的开发环境下,新建一个工程,然后将本文件中的各个源代码添加进工程里,即可运行仿真。-FPGA-based bus design can use verilog language. FPGA development environment, a new project, and then the paper all the source code to add the project, Simulation can be run.
Platform: | Size: 862208 | Author: 李浩 | Hits:

[VHDL-FPGA-Verilogfpga(CAN)

Description:
Platform: | Size: 865280 | Author: 刘立 | Hits:

[VHDL-FPGA-VerilogFIFO

Description: 一个可以综合的Verilog 写的FIFO存储器 内附文档说明-a comprehensive Verilog can write FIFO memory attached document shows
Platform: | Size: 14336 | Author: wutailiang | Hits:

[VHDL-FPGA-VerilogCAN_IPCore

Description: CAN_IPCore CAN协议的IP核源代码 verilog 语言
Platform: | Size: 61440 | Author: maliang | Hits:

[VHDL-FPGA-VerilogSPI_Code(Verilog)

Description: SPI总线硬件描述语言Verilog下的实现,含主模式和从模式的实现,经过仿真验证,可作为一个单独的模块使用-SPI bus under the Verilog hardware description language to achieve with the main mode and slave mode realization, through simulation, can be used as a separate module uses
Platform: | Size: 5120 | Author: 高兵 | Hits:

[Other Embeded programhdb3

Description: hdb3的发送端源代码,采用verilog可综合格式书写。已经在多款fpga和cpld芯片成功综合实现。-HDB3 sending client source code, Verilog can be used to write an integrated format. Has been in several FPGA and CPLD chip integrated to achieve success.
Platform: | Size: 1024 | Author: frankey | Hits:

[Otherverilog

Description: 这个是verilog的基本语法指南,通过这个文档可以快速入门,也可以当作资料进行查阅-This is the basic Verilog syntax guide, through the Quick Start document can also be used as a data access
Platform: | Size: 468992 | Author: 朱智寅 | Hits:

[Otherverilog

Description: 再下载一个北航夏宇闻老师的VERILOG讲稿,和他的经典著作从入门到精通还是有些区别的,大家可以换个角度学习VERILOG-Re-download a BUAA Verilog XIA Yu-Wen teacher script, and his classics from the entry to the master or some of the differences, we can learn from another angle Verilog
Platform: | Size: 1631232 | Author: 牛虻 | Hits:

[VHDL-FPGA-VerilogVerilog-PPT

Description: 这是北大的Verilog讲义,PPT,初学者,可以看看.-This is the Beijing University of Verilog lectures, PPT, beginners can take a look at.
Platform: | Size: 263168 | Author: 大金湖 | Hits:

[VHDL-FPGA-Verilogverilog

Description: 北大微电子学系于敦山老师的课件,介绍Verilog HDL、Cadence Verilog仿真器、可综合的Verilog HDL、设计举例、自动布局布线工具、Verilog的词汇约定等内容-Department of Microelectronics, Peking University in the teacher s courseware mts on Verilog HDL, Cadence Verilog simulator can be integrated Verilog HDL, design, for example, automatic placement and routing tools, Verilog, etc. terms agreed
Platform: | Size: 1550336 | Author: 唐进 | Hits:

[VHDL-FPGA-Verilogcan_rtl_verilog.tar

Description: can控制器的verilog语言实现 (还要更多的说明语言了吗?我不知道该写什么了)-controller can realize the Verilog language (even more language it? I do not know what the writing)
Platform: | Size: 34816 | Author: 郑国栋 | Hits:

[VHDL-FPGA-Verilogexample.verilog.pdf

Description: 关于verilog的大量例子,通过这些例子的掌握,可以设计任何常用的程序。-On a large number of examples of Verilog, through mastery of these examples, you can design any commonly used procedures.
Platform: | Size: 113664 | Author: 李里 | Hits:

[Otherref-sdr-sdram-verilog

Description: sdram控制器的开发程序,还有文档,可以参考以下-SDRAM controller development process, there is a document, you can refer to the following
Platform: | Size: 776192 | Author: 王鹏 | Hits:

[ARM-PowerPC-ColdFire-MIPSverilog-CAN-protocol-realization

Description: CAN协议的verilog实现,欢迎大家下载-verilog CAN protocol realization, welcome to download
Platform: | Size: 80896 | Author: 就睡觉 | Hits:
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