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[Other] 97_2D_2Level

Description: 這是一個二維的上提式9/7離散小波的Verilog的源碼,此為Encoder-This is a two-dimensional lift-style 9/7 discrete wavelet of Verilog source code, this is Encoder
Platform: | Size: 7728128 | Author: chiahao | Hits:

[VHDL-FPGA-Verilog] 7led

Description: dp_xiliux 的 CPLD Verilog设计实验,7个LED演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, 7 LED demo. code test.
Platform: | Size: 91136 | Author: pp | Hits:

[VHDL-FPGA-Verilog] dem4bit_hienthi

Description: the verilog source code for being an examble to counts 4-bit number and display in 7-segment.
Platform: | Size: 318464 | Author: connit1986 | Hits:

[Software Engineering] BCD_7Segmentos

Description: System Verilog code to send BCD values to 7 segments displays
Platform: | Size: 1024 | Author: souhaku | Hits:

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