Search - verilog code for DAC

[VHDL-FPGA-Verilog] FPGA-based-DAC

Description: 用fpga实现的DA转换器，有说明和源码，VDHL文件。 A PLD Based Delta-Sigma DAC Delta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinary performance and low cost of today s audio CD players. The simplest Delta-Sigma DAC consists of a Delta-Sigma modulator and a one bit DAC. Since, both of these components can be realized using digital circuits, it is possible to implement a low precision Delta-Sigma DAC using a PLD.-Using FPGA to achieve the DA converter, has descriptions and source code, VDHL document. A PLD Based Delta-Sigma DACDelta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinaryperformance and low cost of today s audio CDplayers. The simplest Delta-Sigma DAC consists of aDelta-Sigma modulator and a one bit DAC. Since , both of these components can be realized usingdigital circuits, it is possible to implement a lowprecision Delta-Sigma DAC using a PLD.
Platform: | Size: 58368 | Author: 开心 | Hits:

[Other] adc0809dac0832control

Description: adc0809和dac的共同使用（verilog代码），虽然功能简单，但内容全面，新手原创，共同学习-adc0809 and dac common use (verilog code), although the function of simple, but comprehensive, new original, the common learning
Platform: | Size: 6144 | Author: 山哥 | Hits:

[VHDL-FPGA-Verilog] TLC5620

Description: Verilog HDL语言，FPGA实现TLC5620的DAC源代码-Verilog HDL language, FPGA implementation of the DAC TLC5620 source code
Platform: | Size: 496640 | Author: 双目林 | Hits:

[VHDL-FPGA-Verilog] ADC

Description: a verilog code about dac of audio codec on fpga board.
Platform: | Size: 1024 | Author: DCLAB | Hits:

[VHDL-FPGA-Verilog] DAC

Description: a verilog code about dac of audio codec on fpga board.
Platform: | Size: 1024 | Author: DCLAB | Hits:

[VHDL-FPGA-Verilog] AD5300

Description: DAC AD5300的verilog驱动,整个工程，亲测好用。-verilog code for AD5300 DAC.
Platform: | Size: 422912 | Author: 科龙化 | Hits:

[VHDL-FPGA-Verilog] Codes-and-Reports

Description: Verilog Source code for arbitrary waveform generator- simple DDS algorithm codes run on Xilinx Spartan-3E fpga to show output on dac pin. Please see the included report. its really simple to implement. all source code is given.
Platform: | Size: 10629120 | Author: imranity | Hits:

[VHDL-FPGA-Verilog] PSG

Description: Altera NIOS II 使用的 AY-3-8910 模組 . 包含 AY-3-8910 Verilog code, SOPC builder使用的hw_tcl及R-2R DAC 電路-AY-3-8910 module for Altera Nios II. verilog source code, hw_tcl file and R-2R DAC schematic.
Platform: | Size: 46080 | Author: charlie | Hits:

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list

[VHDL-FPGA-Verilog] FPGA-based-DAC

[Other] adc0809dac0832control

[VHDL-FPGA-Verilog] TLC5620

[VHDL-FPGA-Verilog] ADC

[VHDL-FPGA-Verilog] DAC

[VHDL-FPGA-Verilog] AD5300

[VHDL-FPGA-Verilog] Codes-and-Reports

[VHDL-FPGA-Verilog] PSG

[VHDL-FPGA-Verilog] spi_dac_ad7394_ad7395.v

[VHDL-FPGA-Verilog] d2a_a2d

[VHDL-FPGA-Verilog] DACAD9708

CodeBus www.codebus.net