Description: 这是一个很好的Verilog 编写的8位RISC CPU源码（可做为MCU），并且包括完整的C 语言的测试代码。-This is a very good preparation Verilog 8-bit RISC CPU source (available as MCU), and includes a complete C language test code. Platform: |
Size: 78848 |
Author:张念华 |
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Description: 使用RTL8019芯片进行以太网通讯的VERILOG源代码.-RTL8019 Ethernet chip to use the Verilog source code for communications. Platform: |
Size: 15483904 |
Author:yan |
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Description: 用verilog编写实现的以太网控制器（MAC）源码，解压后用ISE打开工程即可。-Prepared using verilog implementation Ethernet Controller (MAC) source code, open the project after decompression can be used ISE. Platform: |
Size: 142336 |
Author:陈阳 |
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Description: verilog描述的以太网MAC层源代码，功能正确，已经在FPGA开发板上测试！需要的赶紧下-verilog description of the Ethernet MAC layer source code, function correctly, has been tested in the FPGA development board! Need to hurry the next! ! ! Platform: |
Size: 56320 |
Author:WangYong |
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Description: 以太网MAC网卡的Verilog源代码，可以节省TCP/IP协议的设计开发时间。-Verilog source code for Ethernet MAC network card, you can save the TCP/IP protocol design and development time. Platform: |
Size: 125952 |
Author:lxk |
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Description: verilog实现的FPGA三态以太网链路层通信代码，里面有状态机，并按各个模块的功能分了文件夹，还有说明文档，自定义帧的产生和接收，开发环境为Xilinx ISE，测试无误。-verilog realization FPGA Tri-Mode Ethernet link layer communication code, which the state machine, according to the function of each module sub folder, as well as documentation, self-defined frame generation and reception, the development environment for the Xilinx ISEtest and correct. Platform: |
Size: 3602432 |
Author:trygov |
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Description: 非常详细的千兆以太网MAC verilog代码，可以供硬件设计时有关网络的开发参考-Very detailed Gigabit Ethernet MAC verilog code, can be used for hardware design of the network to develop a reference Platform: |
Size: 704512 |
Author:瞿鑫 |
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Description: 10G高速以太网mac VERILOG源码
可仿真可实现-10G high speed Ethernet MAC verilog code
can be used for synthesis or inplementation Platform: |
Size: 789504 |
Author:王凯 |
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