Search - verilog cordic

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[VHDL-FPGA-Verilog] verilog fft_64_12 DL : 0: radix-4,利用cordic算法实现复乘单元
Update : 2010-05-30 Size : 12.93kb Publisher : mikehonour@126.com
[VHDL-FPGA-Verilog] CORDIC DL : 0: 用verilog写的CORDIC算法实现，很适合做超越函数的运算。通常用于实现正弦乘法，或者坐标变换。-The cordic arithmetic implemented by verilog is adapted to exceed function.It is usually used to implement sine multiplication or coordinate tuansform.
Update : 2025-02-17 Size : 4kb Publisher : diskmps
[VHDL-FPGA-Verilog] 基于CORDIC算法的FFT DL : 0: 采用按时间抽选的基4原位算法和坐标旋转数字式计算机（CORDIC）算法实现了一个FFT实时谱分析系统。-time selected by using the four-situ algorithm and coordinate rotation digital computer (CORDIC) algorithm is one is a real-time FFT spectrum analysis system.
Update : 2025-02-17 Size : 2kb Publisher : 张志华
[Algorithm] CORDIC_FLOAT DL : 0: 这是一个数值计算算法在FPGA中实现的东东。包括CORDIC算法的详细资料还有float型数的详细论述，可供参考。-This is a numerical algorithms in FPGA achieve saucepan. CORDIC algorithm include detailed information is the number of float-type discussed in detail for reference.
Update : 2025-02-17 Size : 2.84mb Publisher : 克林顿
[VHDL-FPGA-Verilog] CORDIC01 DL : 0: CORDIC算法的硬件实现用的verilog语言-CORDIC algorithm Hardware Implementation of the Verilog language
Update : 2025-02-17 Size : 216kb Publisher : 李文文
[Communication] Cordic_c DL : 0: cordic算法广泛使用，参考一下它的代码-Coordinate rotation digital algorithm widely used reference to what it code
Update : 2025-02-17 Size : 381kb Publisher : wu zemin
[Other] CORDIC-algorithms DL : 0: cordic算法的详细介绍，方便大家使用和研究-cordic detailed description of the algorithm, to facilitate the use and research
Update : 2025-02-17 Size : 120kb Publisher : mh
[VHDL-FPGA-Verilog] CordicverilgHDL DL : 0: 实现cordic算法，输入数据为16位，为提高精度，输出为20位。-achieve cordic algorithm, the input data for the 16, to increase accuracy and output 20.
Update : 2025-02-17 Size : 6kb Publisher : 叶艳
[VHDL-FPGA-Verilog] magnitude DL : 0: Verilog HDL: Magnitude For a vector (a,b), the magnitude representation is the following: A common approach to implementing these arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm calculates the trigonometric functions of sine, cosine, magnitude, and phase using an iterative process. It is made up of a series of micro-rotations of the vector by a set of predetermined constants, which are powers of two. Using binary arithmetic, this algorithm essentially replaces multipliers with shift and add operations. In a Stratix™ device, it is possible to calculate some of these arithmetic functions directly, without having to implement the CORDIC algorithm. -Verilog HDL : For a vector magnitude (a, b), the magnitude representation is the following : A common approach to implementing thes e arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm calculates the trigonome tric functions of sine, cosine, magn itude, and phase using an iterative process. It i 's made up of a series of micro-rotations of the v ector by a set of predetermined cons tants, which are powers of two. Using binary ar praxiology metic, this algorithm essentially replaces m ultipliers with shift and add operations. In a Stratix
Update : 2025-02-17 Size : 12kb Publisher : 郝晋
[VHDL-FPGA-Verilog] cordic_2 DL : 0: 叠代结构的cordic的verilog代码-CORDIC iterative structure of Verilog code
Update : 2025-02-17 Size : 2kb Publisher : zq
[VHDL-FPGA-Verilog] CORDIC DL : 0: 介绍了CORDIC数字计算机的设计，采用的是verilogHDL,在modelsim上可以实现仿真验证，压缩包中包含CORDIC的工作结构图，比较详细-Introduced the CORDIC digital computer design, using the verilogHDL, can be achieved on the ModelSim simulation, compressed package that contains the work of CORDIC structure diagram, a more detailed
Update : 2025-02-17 Size : 138kb Publisher : yaoyongshi
[VHDL-FPGA-Verilog] cordic DL : 0: cordic算法的Verilog HDL具体实现-CORDIC algorithm specific realize Verilog HDL
Update : 2025-02-17 Size : 7kb Publisher : 王伟
[VHDL-FPGA-Verilog] cordic DL : 0: verilog源代码，用于软件无线电中，cordic函数-Verilog source code for software radio, cordic function
Update : 2025-02-17 Size : 2kb Publisher : 史兵
[VHDL-FPGA-Verilog] cordic DL : 0: cordic verilog 程序及仿真结果 8级流水线-cordic verilog simulation results procedures and eight lines
Update : 2025-02-17 Size : 1kb Publisher : elisen
[VHDL-FPGA-Verilog] cordic DL : 0: 本代码使用verilog编写了CORDIC数字计算机的设计-This code uses the Verilog CORDIC has prepared the design of digital computers
Update : 2025-02-17 Size : 1kb Publisher : 石小磊
[VHDL-FPGA-Verilog] cordic-magnitude DL : 0: verilog code for magnitude cordic algrithm
Update : 2025-02-17 Size : 1kb Publisher : meysam
[VHDL-FPGA-Verilog] cordic DL : 0: altera cordic ip core, 包含文档，完整设计，以及测试向量-altera coedic ip core, including the document, whole design, and the testbench.
Update : 2025-02-17 Size : 875kb Publisher : panzhijian
[VHDL-FPGA-Verilog] cordic DL : 0: 该程序使用Verilog语言，可以生成dds正余弦信号-The program uses the Verilog language, can generate sine and cosine signals dds
Update : 2025-02-17 Size : 6kb Publisher : 王丽
[VHDL-FPGA-Verilog] cordic-verilog DL : 0: 用Verilog写的cordic相位鉴别，采用8级的流水线的硬件设计-Written using Verilog cordic phase identification, using 8-level hardware design of the pipeline
Update : 2025-02-17 Size : 1kb Publisher : 朱子翰
[VHDL-FPGA-Verilog] cordic DL : 0: Cordic algorithm implementation in verilog for use in DDS
Update : 2025-02-17 Size : 5kb Publisher : zcos123

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