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[ARM-PowerPC-ColdFire-MIPS] ethernet_verilog

Description: 这是一个很好的Verilog 编写的8位RISC CPU源码（可做为MCU），并且包括完整的C 语言的测试代码。-This is a very good preparation Verilog 8-bit RISC CPU source (available as MCU), and includes a complete C language test code.
Platform: | Size: 78848 | Author: 张念华 | Hits:

[Other Embeded program] ethernet.tar

Description: 以太网10/100M IP核Verilog源码，可综合。-IP Ethernet 10/100 nuclear Verilog source can be integrated.
Platform: | Size: 934912 | Author: 箫勇天 | Hits:

[VHDL-FPGA-Verilog] ethern

Description: 此代码是用Verilog实现的以太网接口,在此基础上做修改,可以作为一般的以太网接口程序开发.-this Verilog code is used to achieve the Ethernet interface, in this done on the basis of changes as a general Ethernet interface development.
Platform: | Size: 123904 | Author: 刘志明 | Hits:

[VHDL-FPGA-Verilog] ethernet__verilog

Description: fpga模拟以太网物理层的源代码，用verilog硬件描述语言开发。-FPGA simulation of the Ethernet physical layer of the source code, using Verilog hardware description language development.
Platform: | Size: 330752 | Author: 王贤 | Hits:

[VHDL-FPGA-Verilog] amba_verilog

Description: IC设计相关，arm内的AMBA桥实现的源码，verilog语言实现，-IC design, arm within the realization of the source AMBA bridge, verilog language,
Platform: | Size: 18432 | Author: 伊路发 | Hits:

[VHDL-FPGA-Verilog] MAC

Description: 10M/100M以太网mac子层802.3协议的源代码，包括半双工和全双工。-Mac sublayer 10M/100M Ethernet 802.3 protocol source code, including half-duplex and full duplex.
Platform: | Size: 122880 | Author: fiercewind | Hits:

[VHDL-FPGA-Verilog] ethernet_tri_mode_rtl.tar

Description: 以太网控制器verilog，含有mac,mii接口-Ethernet controller verilog, containing mac, mii interface
Platform: | Size: 37888 | Author: | Hits:

[Crack Hack] crc

Description: 用于10M，100M，1000M以太网的并行CRC算法，有别于一般的CRC算法。verilog描述-For 10M, 100M, 1000M Ethernet parallel CRC algorithm, the CRC algorithm is different from the ordinary. Verilog Description
Platform: | Size: 1024 | Author: winwalk | Hits:

[VHDL-FPGA-Verilog] ETHERNET

Description: 具备GMII接口和ARP协议功能的千兆以太网控制器。经过Xilinx SPATAN-III FPGA验证, Verilog描述-With GMII interface and feature ARP protocol Gigabit Ethernet controller. After Xilinx SPATAN-III FPGA verification, Verilog description
Platform: | Size: 69632 | Author: winwalk | Hits:

[SCM] RedLogic_8019

Description: 使用RTL8019芯片进行以太网通讯的VERILOG源代码.-RTL8019 Ethernet chip to use the Verilog source code for communications.
Platform: | Size: 15483904 | Author: yan | Hits:

[VHDL-FPGA-Verilog] Ethernet_verilog_ip_core

Description: Ethernet(以太网)verilog ip core用verilogHDL语言写的以太网软核，对学习verilog语言和以太网有很大帮助。-Ethernet (Ethernet) verilog ip core language used verilogHDL Ethernet soft-core, learning Verilog language and Ethernet are very helpful.
Platform: | Size: 903168 | Author: houlongting | Hits:

[Internet-Network] Verilog

Description: Verilog实现的以太网接口源程序代码-Realize the Ethernet interface Verilog source code
Platform: | Size: 129024 | Author: zhl | Hits:

[SCM] ethernet.tar

Description: 10M/100M以太网ipcore，包括说明文档和整个源码-10M/100M Ethernet ipcore, including documentation and the source
Platform: | Size: 936960 | Author: 李达明 | Hits:

[Other] EHERNETIPcore

Description: 该文件包含以太网IP核的相关代码，一共包含24个VERILOG源代码-This document contains the relevant Ethernet IP core code, a total of 24 includes Verilog source code
Platform: | Size: 69632 | Author: season | Hits:

[VHDL-FPGA-Verilog] ethernet.tar

Description: 以太网的vhdl和verilog代码，供大家学习-Ethernet VHDL and Verilog code for everyone to learn
Platform: | Size: 934912 | Author: sunlee | Hits:

[Other] ldpc_decoder_802_3an.tar

Description: 802.3an Ethernet 以太网络 LDPC Verilog 网表实现-802.3an Ethernet Ethernet LDPC Verilog netlist to achieve
Platform: | Size: 914432 | Author: | Hits:

[VHDL-FPGA-Verilog] definetbcode

Description: ethernet files verilog code
Platform: | Size: 4096 | Author: minh | Hits:

[VHDL-FPGA-Verilog] MAC

Description: Verilog code for MAC
Platform: | Size: 1053696 | Author: dheeru | Hits:

[VHDL-FPGA-Verilog] ethernet_tri_mode.rel-1-0.tar

Description: ethernet mac verilog code.eth 10 100 1000mb/s
Platform: | Size: 690176 | Author: amir | Hits:

[source in ebook] verilog

Description: verilog描述的以太网MAC层源代码，功能正确，已经在FPGA开发板上测试！需要的赶紧下-verilog description of the Ethernet MAC layer source code, function correctly, has been tested in the FPGA development board! Need to hurry the next! ! !
Platform: | Size: 56320 | Author: WangYong | Hits:
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