Description: 课程设计要求设计并用FPGA实现一个数字频率计，具体设计要求如下： 测量频率范围： 10Hz～100KHz 精度： ΔF / F ≤ ±2 % 系统外部时钟： 1024Hz 测量波形： 方波 Vp-p ＝ 3～5 V 硬件设备：Altera Flex10K10 五位数码管 LED发光二极管 编程语言：Verilog HDL / VHDL-curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F / F 2% external clock system : 1024Hz Waveform Measurement : square Vp-p = 3 ~ 5 V hardware : Altera Flex10K10 five digital LED light emitting diode programming languages : Verilog HDL / VHDL Platform: |
Size: 144900 |
Author:兰 |
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Description: 课程设计要求设计并用FPGA实现一个数字频率计，具体设计要求如下： 测量频率范围： 10Hz～100KHz 精度： ΔF / F ≤ ±2 % 系统外部时钟： 1024Hz 测量波形： 方波 Vp-p ＝ 3～5 V 硬件设备：Altera Flex10K10 五位数码管 LED发光二极管 编程语言：Verilog HDL / VHDL-curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F/F 2% external clock system : 1024Hz Waveform Measurement : square Vp-p = 3 ~ 5 V hardware : Altera Flex10K10 five digital LED light emitting diode programming languages : Verilog HDL/VHDL Platform: |
Size: 144384 |
Author:兰 |
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Description: 基于FPGA的交通灯系统控制程序。用的是verilog.-FPGA-based traffic signal system control procedures. Using verilog. Platform: |
Size: 144384 |
Author:fuyu |
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Description: 这个是用verilog语言编写的基于FPGA的交通灯控制器，分别控制四个方向上的交通灯的通断-The verilog language is FPGA-based traffic light controller, respectively, the four direction control of traffic lights-off Platform: |
Size: 48128 |
Author:jyb |
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Description: FPGA入门程序。适合编程初学者的学习。由开关控制LED灯的亮灭。ISE集成开发环境。Verilog HDL语言编写-FPGA entry procedures. Programming for beginners to learn. LED lights from the light switch control off. ISE Integrated Development Environment. Language Verilog HDL Platform: |
Size: 244736 |
Author:李海波 |
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Description: Altera FPGA流水灯工程文件Verilog语言代码，作为入门级的参考程序-Altera FPGA Verilog flow light project files language code, as the entry-level reference program Platform: |
Size: 234496 |
Author:kiling |
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Description: 该代码利用DE0 nano上面的ADI ADXL345三轴重力传感器实现重力感应，根据偏转角度的不同点亮相应方向上面的LED灯，稍加修改，还能够将各个方向上面的重力加速度值实时显示，希望大家喜欢-The code used DE0 nano gravity above the ADI ADXL345 three-axis accelerometer sensors to achieve according to the deflection angle of light in different directions above the corresponding LED light, slightly modified, but also to the acceleration of gravity in all directions above the value of real-time display, I hope you like ... Platform: |
Size: 45056 |
Author:王国庆 |
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Description: 该程序是有verilog实现的fpga的交通灯 适用于cycloneII芯片 可供fpga初学者学习verilog语言时参考，不仅可以显示时钟 还能调整时钟分针秒针-The program is a verilog realize fpga of traffic light is applicable to cycloneII chips available for beginners to learn verilog fpga languages as reference, not only can display the clock can adjust clock minute hand a second hand Platform: |
Size: 589824 |
Author:林原 |
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Description: 用verilog语言编写的按键控制流水灯实验程序。通过3个按键可以分别控制流水灯的亮灭、左移、右移。压缩包内也包含此按键控制流水灯实验程序的modelsim仿真文件。-Verilog language with control buttons light water experimental procedure. By three buttons can control the light water lights off, left, right. This archive also contains a button control in light water experimental procedure modelsim simulation files. Platform: |
Size: 190464 |
Author:广子 |
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Description: 该模块实现道路交通灯控制，使用verilog语言编写，在FPGA上实现。验证正确。-The module of traffic light control, the use of Verilog language, based on FPGA. Verify that the correct. Platform: |
Size: 1016832 |
Author:庄德坤 |
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Description: 一些verilog语言程序，可在板子上实现流水灯，计数，按键等功能。-Some verilog language program, can be achieved on the board flowing water light, count, buttons, and other functions. Platform: |
Size: 2228224 |
Author:王先生 |
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Description: 利用verilog语言实现fpga硬件下一个简单的流水灯试验,三只灯实现流水操作,一只实现闪烁操作,非常好的入门参考经典实例-Language verilog fpga hardware utilization under a simple light water experiment, three lights to achieve pipelined to achieve a flashing operation, a very good introductory reference to the classic examples Platform: |
Size: 120832 |
Author:havi |
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Description: 人脸检测与跟踪是一个重要而活跃的研究领域，它在视频监控、生物特征识别、视频编码等领域有着广泛的应用前景。该项目的目标是在FPGA板上实现实时系统来检测和跟踪人脸。人脸检测算法包括肤色分割和图像滤波。通过计算被检测区域的质心来确定人脸的位置。该算法的软件版本独立实现，并在matlab的静止图像上进行测试。虽然从MATLAB到Verilog的转换没有预期的那样顺利，实验结果证明了实时系统的准确性和有效性，甚至在不同的光线、面部姿态和肤色的条件下也是如此。所有硬件实现的计算都是以最小的计算量实时完成的，因此适合于功率受限的应用。(Face detection and tracking is an important and active research field, and it has a wide range of applications in video surveillance, biometrics, video coding and other fields. The goal of the project is to implement real-time systems on the FPGA board to detect and track faces. Face detection algorithms include skin segmentation and image filtering. The location of the human face is determined by calculating the centroid of the detected region. The software version of the algorithm is implemented independently and tested on MATLAB still images. Although the conversion from MATLAB to Verilog is not as smooth as expected, the experimental results demonstrate the accuracy and effectiveness of real-time systems, even in different light, facial gestures and color conditions. All hardware implementations are performed in real-time with minimal computational complexity and are therefore suitable for power constrained applications.) Platform: |
Size: 63488 |
Author:合发
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Description: LED流水广告灯
工程说明
在本案例中，使用常用的verilog语言完成该程序，设计并控制8个灯的花式或循环点亮；即上电后，实现左移和右移交替的流水灯。
案例补充说明
在FPGA电路设计中，尽管流水灯的设计属于比较简单的入门级应用，但是其运用到的方法，是FPGA设计中最核心和最常用部分之一，是FPGA设计必须牢固掌握的基础知识。从这一步开始，形成良好的设计习惯，写出整洁简洁的代码，对于FPGA设计师来说至关重要。(LED flow advertising lights
Engineering description
In this case, use the commonly used Verilog language to complete the program, design and control 8 lights fancy or cycle light; that is, after power, to achieve the "left shift" and "right shift" alternating water lamp.
Case Supplement
In FPGA design, although water lamp design is an entry-level application is relatively simple, but the method is one of the most important and most commonly used parts of FPGA design, FPGA design is the foundation of knowledge must have a firm grasp of the. From this step, it is important for FPGA designers to form good design habits and write neat, concise code.) Platform: |
Size: 100352 |
Author:明德扬科教
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Description: 控制开发板上的4个LED灯，计数器记到4秒清零，控制LED灯依次亮(Controlling the four leds on the development board, the counter down to the 4 seconds reset, the control the LED light in turn) Platform: |
Size: 16449536 |
Author:意中人8383 |
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Description: 设计一个用于篮球比赛的定时器。要求：
（1）定时时间为24秒，按递减方式计时，每隔1秒，定时器减1；
（2）定时器的时间用两位数码管显示；
（3）设置两个外部控制开关，开关K1控制定时器的直接复位/启动计时，开关K2控制定时器的暂停/连续计时；当定时器递减计时到零（即定时时间到）时，定时器保持零不变，同时发出报警信号，报警信号用一个发光二极管指示。
（4）输入时钟脉冲的频率为50MHz。
（5）用Verilog HDL语言设计，用Modelsim软件做功能仿真，用Quartus II综合。(Design a basketball game timer. Requirements:
(1) the timing time is 24 seconds, which is timed in a decreasing manner. Every second, the timer is reduced by 1.
(2) the time of the timer is displayed with two digital tubes;
(3) two external control switches are set. Switch K1 controls the direct reset/start time of the timer, and switch K2 controls the pause/continuous time of the timer. When the timer declinates to zero (that is, when the timer time reaches zero), the timer remains unchanged, and an alarm signal is sent at the same time. The alarm signal is indicated by a light-emitting diode.
(4) the input clock pulse frequency is 50MHz.
(5) design with Verilog HDL language, perform function simulation with Modelsim software, and integrate with Quartus II.) Platform: |
Size: 1972224 |
Author:严老板 |
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