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[Other resource] 《Verilog黄金指南》中文翻译版

Description: Verilog的学习资料，可编程器件fpga的开发语言，有重点介绍Verilog的关键语法-Verilog learning materials, they simply PLD development language, and to highlight the key Verilog syntax
Platform: | Size: 469160 | Author: 张 | Hits:

[Other resource] PushButton_Debouncer

Description: KEY INPUT DEBUNCE VERILOG-KEY INPUT DEBUNCE verilog
Platform: | Size: 1176 | Author: 林潮東 | Hits:

[Other] 《Verilog黄金指南》中文翻译版

Description: Verilog的学习资料，可编程器件fpga的开发语言，有重点介绍Verilog的关键语法-Verilog learning materials, they simply PLD development language, and to highlight the key Verilog syntax
Platform: | Size: 468992 | Author: 张 | Hits:

[VHDL-FPGA-Verilog] PushButton_Debouncer

Description: KEY INPUT DEBUNCE VERILOG-KEY INPUT DEBUNCE verilog
Platform: | Size: 1024 | Author: 林潮東 | Hits:

[VHDL-FPGA-Verilog] key

Description: 一个4*4矩阵键盘的VERILOG接口程序设计（FPGA）-A 4* 4 matrix keyboard interface program Verilog Design (FPGA)
Platform: | Size: 199680 | Author: 林虎 | Hits:

[Crack Hack] verilog

Description: 用于aes128加密的扩展密钥算法，比较详细-For the expansion of key aes128 encryption algorithm, a more detailed
Platform: | Size: 11264 | Author: zsh | Hits:

[Windows Develop] key

Description: 使用verilog实现的4x4的键盘，但是把延时程序去掉了，可以给大家参考-Verilog realize the use of the 4x4 keyboard, but to delay proceedings removed, you can refer to the U.S.
Platform: | Size: 199680 | Author: wphyl | Hits:

[VHDL-FPGA-Verilog] key

Description: 键扫描 处理程序 verilog 使用时钟为50Hz // 低电平为按下,高电平为断开 // 输出状态,1为键入,0为无键-Key scanning process using the clock for Verilog 50Hz// low level for the press, high for the disconnect// output state, one for the type, 0 for no key
Platform: | Size: 1024 | Author: 王亮 | Hits:

[VHDL-FPGA-Verilog] key

Description: verilog键盘防抖程序，很有实用性 verilog键盘防抖程序，很有实用性-Reduction procedures verilog keyboard is very practicalReduction procedures verilog keyboard is very practicalReduction procedures verilog keyboard is very practical
Platform: | Size: 293888 | Author: jack | Hits:

[VHDL-FPGA-Verilog] key

Description: cyclone系列下，采用计数器现实案件消抖的verilog HDL语言源码-series under the cyclone, the consumer cases Buffeting counter the reality of the verilog HDL language source code! !
Platform: | Size: 382976 | Author: wang | Hits:

[VHDL-FPGA-Verilog] key

Description: Verilog HDL编写的键盘扫描程序，考虑了判断按键弹起的问题。程序按一定的频率用低电平循环扫描行线，同时检测列线的状态，一旦判断有一列为低则表示有键被按下，停止扫描并保持当前行线的状态，再读取列线的状态从而得到当前按键的键码；等待按键弹起：检测到各列线都变成高点平后，重新开始扫描过程，等待下一次按键。-Written in Verilog HDL keyboard scanner, taking into account to determine key bounce problem. Program according to a certain frequency of scan lines with low-level circulation lines, while testing out the state line, once the judge has said there is a classified as low-key is pressed, stop the scan and to maintain the current line-line state, and then read out line state to get the current keys key codes to wait for key pop-up: To detect the lines at all out into a high level after the re-start the scanning process, waiting for the next key.
Platform: | Size: 2201600 | Author: 力文 | Hits:

[SCM] miaobiao

Description: 用VERILOG实现秒表的开发设计，(1)熟悉按键扫描、按键防抖和数码管驱动接口电路原理；(2)掌握按键扫描、按键防抖和数码管驱动接口电路设计开发；(3)掌握状态机实际应用设计。-To achieve the development of a stopwatch with VERILOG Design, (1) be familiar with key scanning, image stabilization and digital control key driver interface circuit theory (2) master key scanning, image stabilization and digital control key driver interface circuit design and development (3) control the state machine practical applications.
Platform: | Size: 2441216 | Author: 邓军 | Hits:

[Embeded-SCM Develop] key_vhd

Description: verilog hdl key test-key test vhdl
Platform: | Size: 1024 | Author: 张威 | Hits:

[VHDL-FPGA-Verilog] key

Description: 基于Verilog HDL的编程程序实现，主要是一个键盘扫描程序-These are program examples based on Verilog HDL
Platform: | Size: 408576 | Author: shanglin | Hits:

[VHDL-FPGA-Verilog] VHDL_Elimination-of-key-jitter

Description: 基于VHDL语言下的消除键抖动程序设计，很简单易懂的-Elimination of key jitter
Platform: | Size: 3072 | Author: vanrry | Hits:

[VHDL-FPGA-Verilog] key

Description: verilog HDL硬件语言的按键扫描程序，很精简准确，十多次试验的总结与积累-verilog HDL language key scanner hardware, very concise accurate summary of a dozen experiments and the accumulation of
Platform: | Size: 10240 | Author: 栞谛 | Hits:

[VHDL-FPGA-Verilog] Key

Description: verilog键盘扫描码完整程序，已在quartus ii软件上验证。-verilog keyboard scan code complete program has been in quartus ii software verification.
Platform: | Size: 88064 | Author: Mefrank | Hits:

[SCM] KEY

Description: 本人用verilog编写的按键控制，经测试可用。(I am prepared to use verilog KEY controller, the test is available.)
Platform: | Size: 382976 | Author: chenpeiweiweiwei | Hits:

[VHDL-FPGA-Verilog] KEY

Description: 使用verilog编写的用按键控制LED灯，对于初学者是很好的锻炼(Using the key to control the LED lamp with Verilog is a good exercise for the beginner.)
Platform: | Size: 1286144 | Author: 记忆中的我 | Hits:

[Documents] Verilog book2

Description: 本指南按字母顺序组织，以每页顶部的关键字词条作为索引，只要快速翻阅指南查找相应的关键字词条的就可以找到想要的信息(This guide is organized in alphabetical order. The key words at the top of each page are indexed. As long as we quickly browse the guide to find the corresponding keyword entries, we can find the desired information.)
Platform: | Size: 1359872 | Author: zxx233 | Hits:
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