Search - verilog led

Search - verilog led - List

[VHDL-FPGA-Verilog] mico8_demo工程 DL : 0: mico8驱动led工程源码
Update : 2010-10-08 Size : 1.79mb Publisher : apipi_2010
[SourceCode] verilog电子琴 DL : 2: 用verilog编写的电子琴，用8个按键实现8个音调，并控制相应led灯闪烁，集成了按键消抖功能
Update : 2011-02-03 Size : 12.59mb Publisher : ikedodo
[VHDL-FPGA-Verilog] 4位7段led灯控制 DL : 0: 4位7段led灯的控制，0000-9999动态显示
Update : 2011-06-01 Size : 26.15kb Publisher : feiyi_2001@eyou.com
[VHDL-FPGA-Verilog] 数字频率计实验报告 DL : 1: 课程设计要求设计并用FPGA实现一个数字频率计，具体设计要求如下：测量频率范围： 10Hz～100KHz 精度： ΔF / F ≤ ±2 % 系统外部时钟： 1024Hz 测量波形：方波 Vp-p ＝ 3～5 V 硬件设备：Altera Flex10K10 五位数码管 LED发光二极管编程语言：Verilog HDL / VHDL-curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F/F 2% external clock system : 1024Hz Waveform Measurement : square Vp-p = 3 ~ 5 V hardware : Altera Flex10K10 five digital LED light emitting diode programming languages : Verilog HDL/VHDL
Update : 2025-02-17 Size : 141kb Publisher : 兰
[VHDL-FPGA-Verilog] 双路脉冲发生器（veralog） DL : 0: Verilog HDL 程序双路脉冲发生器的代码包含了键盘控制，LED显示，脉冲发生，脉冲频率测量模块是我自己写得，希望能对你有帮助，有问题可以mail：shaojunwu1@163.com-Verilog HDL dual-channel pulse generator procedure code includes a keyboard control, LED display, pulse, pulse frequency measurement module is written I hope to help you, it can be mail : shaojunwu1@163.com
Update : 2025-02-17 Size : 4kb Publisher : 邵君武
[VHDL-FPGA-Verilog] 8LEDverilog DL : 0: //led.v /*------------------------------------- LED显示模块：led(CLK,AF,ADDR,DATA) 功能：显示注意事项： 8位LED 参数： CLK:扫妙时钟输入，推荐1kHz AF:数码管输出，a～h ADDR:数码管选择位数出，0~2 DATA:显示数据输入0~9999 9999 编写人：黄道斌编写日期： 2006/07/13 -------------------------------------*/-//led.v /*------------------------------------- LED Display Module : led (CLK, AF, ADDR. DATA) function : to show : 8 LED parameters : CLK : So Wonderful clock input, Suggest 1kHz AF : digital tube output, a ~ h ADDR : digital control options from the median, 0 ~ 2 DATA : data show that the importation of 0 ~ 9999 9999 prepared : Huang Daobin preparation date : 2006/07/13-------------------------------------*/
Update : 2025-02-17 Size : 1kb Publisher : 黄道斌
[VHDL-FPGA-Verilog] pwmled DL : 0: 一个霹雳灯的Verilog源程序，用PWM原理实现，产生了LED灯的渐弱效果-a thunderbolt lights Verilog source files, using PWM principle realized, LED lights have a gradual effect of the weak
Update : 2025-02-17 Size : 499kb Publisher : 张伟
[VHDL-FPGA-Verilog] verilogled DL : 0: cpld-epm7128stc100-10驱动四位LED结果显示1234-cpld- epm7128stc100-10 drive four LED 1234 results
Update : 2025-02-17 Size : 193kb Publisher : 章风
[VHDL-FPGA-Verilog] LED47DISP DL : 0: 4-7segment led display Verilog code. Implemented at Stratix EP1S25 DSP development board.-4-7segment led display Verilog code. Impl emented at Stratix EP1S25 DSP development boar d.
Update : 2025-02-17 Size : 2kb Publisher : iamz
[VHDL-FPGA-Verilog] LED DL : 0: 数字时钟显示模块,用VERILOG HDL 实现-Digital clock display module, using the realization of VERILOG HDL
Update : 2025-02-17 Size : 11kb Publisher : liufanyu
[VHDL-FPGA-Verilog] dynamic_display DL : 0: 4 digital LED dynamic display的Verilog HDL源代码，它能动态的显示4位数，为FPGA 的DEBUG 提供便利，非常经典，简单易懂，并且经过了Modelsim/ISE/FPGA(XC3S250ETQ144)验证和实现，好的行为模型就应该大家分享。-4 digital LED dynamic display of the Verilog HDL source code, it can dynamically display 4-digit for the FPGA to facilitate the DEBUG, very classic, easy-to-read, and after Modelsim/ISE/FPGA (XC3S250ETQ144) authentication and realize, good The behavior model should be shared.
Update : 2025-02-17 Size : 251kb Publisher : name
[VHDL-FPGA-Verilog] led DL : 0: VERILOG实现LED的控制，实现动态刷新显示210。控制LED显示的模板程序-Verilog realization of LED control, dynamic refresh display 210. LED display control procedure template
Update : 2025-02-17 Size : 102kb Publisher : 张猛蛟
[VHDL-FPGA-Verilog] 7led DL : 0: dp_xiliux 的 CPLD Verilog设计实验,7个LED演示.代码测试通过. -dp_xiliux the CPLD Verilog design experiments, 7 LED demo. code test.
Update : 2025-02-17 Size : 89kb Publisher : pp
[VHDL-FPGA-Verilog] 3_4×4 DL : 0: verilog 键盘输入程序，用于led灯的显示-Verilog keyboard input program for led lights display
Update : 2025-02-17 Size : 613kb Publisher : tang
[VHDL-FPGA-Verilog] led DL : 0: 适用于FPGA初学者,一个流水灯的程序,用VERILOG语言写的.-Applicable to FPGA beginners, a procedure for light water, using the Verilog language.
Update : 2025-02-17 Size : 213kb Publisher : 李
[VHDL-FPGA-Verilog] code DL : 0: Verilog的LED控制器源程序，用于LED显示屏幕的控制。-Verilog source code of the LED controller for the LED display screen control.
Update : 2025-02-17 Size : 2kb Publisher : 王
[Books] verilog DL : 0: verilog to led control
Update : 2025-02-17 Size : 1kb Publisher : max
[VHDL-FPGA-Verilog] led DL : 0: Verilog 流水灯程序这个可以作为初级入门练习使用，产生感性认识！-Verilog flow light program that can be used as the primary entry to practice, resulting in perceptual knowledge!
Update : 2025-02-17 Size : 305kb Publisher : xiaoming
[VHDL-FPGA-Verilog] LED DL : 0: verilog实现fpga easy030的led闪动-verilog，fpga easy030，led
Update : 2025-02-17 Size : 242kb Publisher : caichao
[VHDL-FPGA-Verilog] Verilog led DL : 0: Xilinx ISE开发平台实现4位的led灯循环点亮源代码，测试文件及约束(4 bit LED lamp cycle lighting)
Update : 2025-02-17 Size : 29kb Publisher : 韩么韩

« 12 3 4 5 6 7 8 9 10 ... 19 »