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[Other resource] VerilogHDLPLI

Description: Verilog HDL的PLI子程序接口，用于与用户C程序在2个方向上传输数据，可用xilinx ISE，quartusii或modelsim仿真，-Verilog HDL PLI subroutine interfaces, for C program with the user in the direction of two transmission of data, available xilinx ISE. quartusii or modelsim simulation,
Platform: | Size: 998 | Author: 杨锐 | Hits:

[Other] pli_handbook_examples_pc

Description: pli_handbook_examples_pc verilog hdl 与C的接口的典型例子-pli_handbook_examples_pc verilog and C hdl The classic example of the interface
Platform: | Size: 372736 | Author: maliang | Hits:

[VHDL-FPGA-Verilog] VerilogHDLPLI

Description: Verilog HDL的PLI子程序接口，用于与用户C程序在2个方向上传输数据，可用xilinx ISE，quartusii或modelsim仿真，-Verilog HDL PLI subroutine interfaces, for C program with the user in the direction of two transmission of data, available xilinx ISE. quartusii or modelsim simulation,
Platform: | Size: 1024 | Author: 杨锐 | Hits:

[VHDL-FPGA-Verilog] Open_Verilog_International_-_VERILOG-HDL_PLI_Refer

Description: pli的文档资料，是cadence出的，详细介绍了pli的使用方法-pli document, the cadence is introduced in detail the use pli
Platform: | Size: 421888 | Author: 王一民 | Hits:

[VHDL-FPGA-Verilog] NcVerilog_tutorial

Description: nc verilog 的使用说明和实例，对于实用nc来进行仿真进行了详细说明。-nc verilog instructions and examples for the utility to carry out simulation nc described in detail.
Platform: | Size: 591872 | Author: 李林 | Hits:

[VHDL-FPGA-Verilog] verilog_pli

Description: pli函数在verilog中大量应用，但介绍pli的资料并不多，压缩包中的文档是我搜集的pli的资料，希望有对你有帮助。-Pli system fuction is used in verilog language, but material related pli in domestic is rare. the rar package is my collection on pli , hop it is useful.:)
Platform: | Size: 2228224 | Author: jhv | Hits:

[VHDL-FPGA-Verilog] Verilog_PLI_Reference_Manual

Description:
Platform: | Size: 421888 | Author: tree | Hits:

[VHDL-FPGA-Verilog] pli_handbook_examples_pc

Description: The Verilog PLI Handbook(contained code)
Platform: | Size: 354304 | Author: park wan soon | Hits:

[VHDL-FPGA-Verilog] The_Verilog_PLI_Handbook

Description: PLI提供verilog模擬上介於軟體和硬體描述語言的溝通工具-The PLI provides a means for both hardware designers and software engineers to interface their own programs to commercial Verilog simulators.
Platform: | Size: 24779776 | Author: harry | Hits:

[VHDL-FPGA-Verilog] VerilPLI

Description: Complete about verilog PLI
Platform: | Size: 25146368 | Author: ngocphukmt | Hits:

[VHDL-FPGA-Verilog] pli_socket_example_pc

Description: vpi/pli socket example code-co-verification using TCP/IP socket (hardware model : verilog+ vpi as server) (software as a client)
Platform: | Size: 26624 | Author: samuel chuang | Hits:

[VHDL-FPGA-Verilog] pli1

Description: Pli verilog编程接口说明书，使用此说明书既可以学习如何调用使用Pli接口对程序进行编程。-Pli User’s guide
Platform: | Size: 1438720 | Author: wangth | Hits:

[VHDL-FPGA-Verilog] PLI-example

Description: PLI是实现C程序和硬件语言，包括VHDL，verilog混合编程的接口规范，本例给出VC++环境示范例子，实现VERILOG可以调用C语言函数。-PLI is the specification to perform interface between C and HDL language. This example give a c function called by verilog!
Platform: | Size: 304128 | Author: hanyu | Hits:

[Other] getPDF.jsp

Description: 非常好用verilog PLI资料，感觉非常有用，讲解清楚，调理清晰，难得的好资料-the tool is very good , for vrilog pli, very useful
Platform: | Size: 2312192 | Author: djc | Hits:

[Software Engineering] verilog-ieee

Description: The Verilog ¤ Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs the communication of hardware design data and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language. Keywords: computer, computer languages, digital systems, electronic systems, hardware, hardware description languages, hardware design, HDL, PLI, programming language interface, Verilog HDL, Verilog PLI, Verilog ¤-The Verilog ¤ Hardware Description Language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs the communication of hardware design data and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language. Keywords: computer, computer languages, digital systems, electronic systems, hardware, hardware description languages, hardware design, HDL, PLI, programming language interface, Verilog HDL, Verilog PLI, Verilog ¤
Platform: | Size: 2177024 | Author: bkaraca | Hits:

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