Description: 基于FPGA设计,verilog语言变成的,SPI通用接口模块,顶层已封装成类似标准的FIFO接口;提供仿真文件;仿真器为modelsim10.0c,波形观察debussy。-Based on the FPGA design, Verilog language into a, SPI universal interface module, the top has been packaged into a FIFO interface similar to that of the standard provide simulation files simulator for modelsim10.0c, waveform observation debussy. Platform: |
Size: 553984 |
Author:Zou Xingyu |
Hits:
Description: sdhc卡spi扇区读verilog例程。包含sdhc卡初始化模块及一个扇区读模块,扇区读完数据放在一个fifo中缓存,为之后的工作做准备,可以集成到自己的项目中。已经在闪迪8Gsdhc卡上亲测成功-sdhc card sector read spi verilog routine. Initialization module and a read module contains sdhc card sector, the sector read data in a cache fifo in preparation for subsequent work, it can be integrated into your own projects. We have been successful in the pro-test card SanDisk 8Gsdhc Platform: |
Size: 4246528 |
Author:王一鸣 |
Hits:
Description: 这个是一个verilog程序,可以用spi读取sd卡中的内容,存到fifo中(This project can read the data from SD card through SPI interface and store the data in FIFO.) Platform: |
Size: 13569024 |
Author:jyc
|
Hits: