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Description: 该程序是在xilinx的FPGA上实现DDR_SDRAM接口，程序是用verylog语言写的-that the procedure was in Xilinx FPGA to achieve DDR_SDRAM interface, procedures used to write the language verylog
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Size: 23407 |
Author: 冯伟 |
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Description: 介绍了Verylog DHL语言的设计过程及综合过程。
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Size: 4966289 |
Author: Kuben |
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Description: verylog语言编程，为异步flipflop的程序。具有数据传输功能，数据位数可以用户设定
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Size: 1516 |
Author: 于玮 |
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Description: verylog hdl教程，硬件编程语言，简单易学，它的语法比起VHDL来说没有那么严格，很适合初学者学习，如果你有C，pascal或者其他语言的基础应该能很快学习入门，本人还有VHDL的视频教程，有意者可以联系我，QQ：25956661
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Size: 4837621 |
Author: 吴风昱 |
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Description: Verylog编写的 Quartus II平台的简单设计实例 附仿真波形
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Size: 75400 |
Author: 许东滨 |
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Description: Verylog编写的 Quartus II平台的简单设计实例 附仿真波形
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Size: 86193 |
Author: 许东滨 |
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Description: 流水灯 Verylog编写的 Quartus II平台的简单设计实例 附仿真波形
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Size: 94148 |
Author: 许东滨 |
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Description: 该程序是在xilinx的FPGA上实现DDR_SDRAM接口，程序是用verylog语言写的-that the procedure was in Xilinx FPGA to achieve DDR_SDRAM interface, procedures used to write the language verylog
Platform: |
Size: 23552 |
Author: 冯伟 |
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Description: 介绍了Verylog DHL语言的设计过程及综合过程。
-Verylog DHL introduce the language design process and integrated process.
Platform: |
Size: 4966400 |
Author: Kuben |
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Description: verylog语言编程，为异步flipflop的程序。具有数据传输功能，数据位数可以用户设定-verylog language programming for asynchronous Flipflop procedures. With a data transmission function, data can be user set the median
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Size: 1024 |
Author: 于玮 |
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Description: verylog hdl教程，硬件编程语言，简单易学，它的语法比起VHDL来说没有那么严格，很适合初学者学习，如果你有C，pascal或者其他语言的基础应该能很快学习入门，本人还有VHDL的视频教程，有意者可以联系我，QQ：25956661-verylog hdl tutorials, hardware programming language, easy to learn, and its grammar than VHDL is no less stringent, it is suitable for beginners to learn, if you have C, pascal or other languages should be able to quickly learning portal, I also VHDL has video tutorials, Interested parties can contact me, QQ: 25956661
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Size: 4837376 |
Author: 吴风昱 |
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Description: Verylog编写的 Quartus II平台的简单设计实例 附仿真波形-Verylog prepared Quartus II platform attached to a simple design example simulation waveforms
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Size: 86016 |
Author: 许东滨 |
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Description: 流水灯 Verylog编写的 Quartus II平台的简单设计实例 附仿真波形-Water lights Verylog prepared Quartus II platform attached to a simple design example simulation waveforms
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Size: 94208 |
Author: 许东滨 |
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Description: 数字部件设计编程，verylog编程，计算机ALU部件编程-Digital Component Design Programming, verylog programming, computer programming ALU components
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Size: 177152 |
Author: 800lin |
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Description: 数字部件设计，verylog，实现用D-FLIP FLOP 实现计数器功能。-Digital Component Design, verylog, using D-FLIP FLOP realize Counter.
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Size: 263168 |
Author: 林玲 |
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Description: SDram 接口verylog 程序 SDram 接口verylog 程序-SDram interface procedures verylog
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Size: 9216 |
Author: lili |
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Description: 测频模块verilog，频率测试程序，用verylog编写。-verylog
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Size: 3072 |
Author: 张强 |
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Description: 键盘扫描verilog,键盘输入的扫描，用verylog语言编写-keyboard verylog
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Size: 1024 |
Author: 张强 |
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Description: MAC层接口标准 verylog HDL 语言-MAC layer interface standard using verylog HDL language
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Size: 1228800 |
Author: zhouli |
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Description: new_coded_lock_final_version 用verylog写的密码锁
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Size: 489472 |
Author: jxh |
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