Search - vhdl p

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[Other resource] P.H.Y_programer DL : 0: 单片机的程序集.大家可以参考一下.我想做一个更好的程序集及电路板.大约在10月份完成.请有兴趣的关注一下.当然我还要做一个通信的vhdl的仿真.-SCM suite. We can take a look. I would like to do a better procedures for collecting and circuit boards. About October completion. those interested in the look. of course, I still have to do a communications VHDL simulation.
Update : 2008-10-13 Size : 27.92kb Publisher : 潘应云
[VHDL-FPGA-Verilog] UART vhdl代码 DL : 0: 基于FPGA的异步串口通信

Update : 2008-12-01 Size : 41.87kb Publisher : hehe520
[Picture Viewer] VGA图像显示 DL : 0: 该项目能将RAM或ROM存储器中储存的十六进制数据显示在VGA显示器上，使用VerilogHDL]语言，在Altera的QuartusII下编译通过。

Update : 2009-02-05 Size : 17.72kb Publisher : submars
[Photo software] vhdl语言100例详解 DL : 5: vhdl语言100例详解

Update : 2008-11-02 Size : 6.67mb Publisher : xiao66lv
[Windows Kernel] CPLD的串口程序（VHDL） DL : 0: 在CPLD上实现UART，利用VHDL进行编程。

Update : 2009-01-03 Size : 729.46kb Publisher : greatlht
[Books] 用VHDL设计电路的很好的英文书 DL : 0: 讲述VHDL设计电路的很好的英文书

Update : 2009-01-05 Size : 4.81mb Publisher : xuyanxia
[Applications] 电子琴VHDL语言 DL : 0: 电子琴VHDL语言

Update : 2009-01-11 Size : 510.44kb Publisher : fpga18
[VHDL-FPGA-Verilog] pwm DL : 0: Update : 2025-02-17 Size : 209kb Publisher : 熊辉波
[VHDL-FPGA-Verilog] 数字频率计实验报告 DL : 1: 课程设计要求设计并用FPGA实现一个数字频率计，具体设计要求如下：测量频率范围： 10Hz～100KHz 精度： ΔF / F ≤ ±2 % 系统外部时钟： 1024Hz 测量波形：方波 Vp-p ＝ 3～5 V 硬件设备：Altera Flex10K10 五位数码管 LED发光二极管编程语言：Verilog HDL / VHDL-curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F/F 2% external clock system : 1024Hz Waveform Measurement : square Vp-p = 3 ~ 5 V hardware : Altera Flex10K10 five digital LED light emitting diode programming languages : Verilog HDL/VHDL
Update : 2025-02-17 Size : 141kb Publisher : 兰
[VHDL-FPGA-Verilog] 自定义逻辑PWM的例子 DL : 0: 是一个用vhdl语言编写的pwm程序，可以方便地用来和nios连接，实现对nios的功能扩展。-is a VHDL language with the PWM procedures can be used to facilitate connections and nios, nios to achieve a functional extension.
Update : 2025-02-17 Size : 10kb Publisher : 石坚
[SCM] P.H.Y_programer DL : 0: 单片机的程序集.大家可以参考一下.我想做一个更好的程序集及电路板.大约在10月份完成.请有兴趣的关注一下.当然我还要做一个通信的vhdl的仿真.-SCM suite. We can take a look. I would like to do a better procedures for collecting and circuit boards. About October completion. those interested in the look. of course, I still have to do a communications VHDL simulation.
Update : 2025-02-17 Size : 28kb Publisher : 潘应云
[Books] modelsim_se_tutor DL : 0: modelsim_se_tutorThis is a set of notes I put together for my Computer Architecture class in 1990. Students had a project in which they had to model a microprocessor architecture of their choice. They used these notes to learn VHDL. The notes cover the VHDL-87 version of the language. Not all of the language is covered (about 95％). -modelsim_se_tutorThis is a set of notes I p ut together for my class Computer Architecture in 1990. Students had a project in which they had to model a microprocessor architecture of thei r choice. They used these notes to learn VHDL. Th e notes cover the VHDL-87 version of the languag e. Not all of the language is covered (about 95%) .
Update : 2025-02-17 Size : 1.93mb Publisher : 罗春晖
[VHDL-FPGA-Verilog] tcm_decode DL : 0: TCM解码，VHDL代码，是我在工作中做的工程代码，时序稳定，里面有syn以及软判决的算法，经典-TCM decoder, VHDL code, yes, I do work in the project code, timing stability, There are syn and soft-decision algorithm, classic!
Update : 2025-02-17 Size : 19kb Publisher : 刘超
[Books] VHDL-Programming-by-Example DL : 0: VHDL Programming by Example（McGraw.Hill著电子版）-VHDL Programming by Example (McGraw.Hill an electronic version )
Update : 2025-02-17 Size : 1.78mb Publisher : 20032211
[MiddleWare] POC DL : 0: 基于VHDL的POC接口控制器,用于CPU与打印机间的数据控制-based on the POC VHDL interface controller, CPU and printer for the data control
Update : 2025-02-17 Size : 82kb Publisher : marscr
[VHDL-FPGA-Verilog] PWM DL : 0: done pwm control using vhdl ,you can look at it.
Update : 2025-02-17 Size : 2kb Publisher : fff
[VHDL-FPGA-Verilog] vhdl-sirenqiangdaqi DL : 1: VHDL的四人抢答器，希望对大家有所帮助啊，-Answer four VHDL, and want to help everybody ah,
Update : 2025-02-17 Size : 156kb Publisher : hanohen
[VHDL-FPGA-Verilog] 76_PID DL : 0: 一个非常好的电机转速控制器VHDL源代码设计-A very good motor speed controller VHDL design source code
Update : 2025-02-17 Size : 2kb Publisher : linew
[VHDL-FPGA-Verilog] 5956446verilog_ppt DL : 0: 具体介绍VHDL的原理，附带相关的例程。欢迎大家收藏下载-Introduced the principle of specific VHDL, incidental related routines. Welcome to the collection download
Update : 2025-02-17 Size : 257kb Publisher : 李哲
[VHDL-FPGA-Verilog] VHDL-topics-Electronic-locks DL : 0: VHDL密码锁设计专题，学习使用VHDL设计密码锁-VHDL design of the password lock feature and learning to use the VHDL design code lock
Update : 2025-02-17 Size : 151kb Publisher : 蔡宇佳

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