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[VHDL-FPGA-Verilog] DEBOUNCE

Description: 一个小程序,弹跳消除电路,可消除按健的毛刺干扰-a small procedure, bouncing elimination circuit, according to remove the burr-interference
Platform: | Size: 1024 | Author: 相耀 | Hits:

[VHDL-FPGA-Verilog] debounce

Description: 基于VHDL的键盘去抖动电路 基于VHDL的键盘去抖动电路-VHDL-based keyboard to jitter circuit VHDL-based keyboard to jitter circuit
Platform: | Size: 288768 | Author: 叶金伟 | Hits:

[OS Develop] debounce

Description: 键盘防抖程序设计，模块化程序；不得不看的好程序，好家伙。-Reduction keyboard programming, modular procedures had a good look at procedures, Goodfellas.
Platform: | Size: 1024 | Author: 吴少 | Hits:

[MiddleWare] debounce

Description: 按键消抖程序，用Verilog硬件描述语言编写，实现了按键消抖动作-Buffeting eliminate key procedures, using Verilog hardware description language, the realization of the keys for jitter elimination
Platform: | Size: 121856 | Author: liujiani | Hits:

[VHDL-FPGA-Verilog] Debouncer_Ver2

Description: super fast debounce button on vhdl, xilinx xc
Platform: | Size: 1024 | Author: Terente | Hits:

[VHDL-FPGA-Verilog] fpga_debounce_filter

Description: fpga debounce filter code in vhdl
Platform: | Size: 39936 | Author: lyle | Hits:

[VHDL-FPGA-Verilog] debounce

Description: a key debounce logic using VHDL
Platform: | Size: 101376 | Author: tg | Hits:

[VHDL-FPGA-Verilog] stable_key

Description: 按键消抖电路,包含VHDL编写的程序，以及VerilogHDL编写的程序-Key debounce circuit, including a program written in VHDL, as well as programs written VerilogHDL
Platform: | Size: 627712 | Author: 路政西 | Hits:

[VHDL-FPGA-Verilog] pingpang

Description: 模拟乒乓球游戏机，输入有按键消抖模块，利用两个七段数码管的其中9段来模拟乒乓球的移动路线，中间的数码管兼做球网。-Table tennis simulation game, enter a key debounce module, using two seven-segment digital tube to simulate the Table Tennis section 9 of the mobile line, cater to the middle of the digital net.
Platform: | Size: 300032 | Author: 李凡 | Hits:

[VHDL-FPGA-Verilog] vhdl_key_with_debounce

Description: vhdl语言编写的消抖电路，用于按键消抖。-vhdl languages ​ ​ debounce circuit for key debounce.
Platform: | Size: 1024 | Author: | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: 键盘去抖，电子密码锁，键盘输入去抖vhdl语言程序-Keyboard debounce
Platform: | Size: 4096 | Author: 范萍伟 | Hits:

[VHDL-FPGA-Verilog] Debounce

Description: VHDL编写。在CPLK开发板上设计的数字钟的去抖动电路。该模块相对独立，是学习去抖动的好资料。该模块跟我其它的8个模块配套构成一个数字钟。-Programmed with VHDL.A debouncing circuit which is part of a digital clock designed on a CPLD development board.The module is independent from others and is useful for learning deboucing methods.It is one of my total 9 modules that are used to design a digital clock.
Platform: | Size: 199680 | Author: chzhsen | Hits:

[VHDL-FPGA-Verilog] fsmd_debounce_exp

Description: vhdl debounce circuit
Platform: | Size: 1024 | Author: rickdecent | Hits:

[VHDL-FPGA-Verilog] debounce

Description: Switch debounce unit (written in VHDL).
Platform: | Size: 20480 | Author: | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: It s a simple calculator of addition and multiplication using a simple stack, with multiple test benches. The files test-button and debounce are for the use on a board for the correct functionality of the input buttons.
Platform: | Size: 17408 | Author: mandara | Hits:

[VHDL-FPGA-Verilog] VHDL-key

Description: VHDL语言程序，具有按键消抖哦，程序比较简单，易明白，欢迎大家下载哦-VHDL language program, with key debounce, the procedure is relatively simple, easy to understand, are welcome to download Oh! ! !
Platform: | Size: 381952 | Author: 陈建华 | Hits:

[Other] VHDL-key1

Description: 利用VHDL程序按键消抖程序，实用性强，易明白，测试成功啦！-VHDL program button debounce procedures, practical, easy to understand, the test is successful!
Platform: | Size: 266240 | Author: 陈建华 | Hits:

[VHDL-FPGA-Verilog] the-elimination-of-key-debounce

Description: 当按一次按健时，由于按健有反应时间、有抖动，可能你按一次机器感应到几次，防抖就是让在按键正常反应时间内机器只感应一次按键效果，防止误操作，本文是基于FPGA的按键防抖程序代码，用的是VHDL语言，内容包括原理，实际操作及源码等。-When you press a pressing health, because according to health have reaction time, jitter, you may press machine senses a few times, image stabilization in the key is to let the normal reaction time machine button only once induced effects, to prevent misuse, the paper is key FPGA-based image stabilization program code, using VHDL language, including theory, practice and source code, etc.
Platform: | Size: 293888 | Author: 李源码 | Hits:

[Software Engineering] debounce

Description: vhdl code of debounce for fpga . you can open it with xilinx and test it with isim or modelsim, it s a good tutorial for writing your first vhdl code and test bench .
Platform: | Size: 891904 | Author: Milad | Hits:

[VHDL-FPGA-Verilog] 按键去抖电路VHDL描述

Description: 在开发板FPGA：Spartan-3E 系列，型号：XC3S500E，封装：FGT320，速度-4，利用Xilinx ISE软件，利用VHDL软件编写按键去抖电路，包含实验说明以及代码实现VHDL.doc文件,UCF管脚绑定文件(In the FPGA:Spartan-3E development board series, XC3S500E, package: FGT320, speed -4, using Xilinx ISE software, write the debounce circuit by using VHDL software, including experimental description and code to achieve the VHDL.doc file, the UCF pin binding file)
Platform: | Size: 29696 | Author: lixilin | Hits:
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