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[Other Embeded programedge_detector

Description: 基于cpld的数字图像边缘检测算法的实现,vhdl源程序-CPLD-based digital image edge detection algorithm, vhdl source code
Platform: | Size: 1024 | Author: jjaai | Hits:

[Graph programsobel

Description: 图像边缘检测的VERILOG实现,能准确检测图像边缘-Image Edge Detection of Verilog realize that can accurately detect image edge
Platform: | Size: 589824 | Author: 李永杰 | Hits:

[AI-NN-PRchap7

Description: 实现血红细胞的阈值变换,边缘检测,边缘提取功能 -Red blood cells to achieve the threshold transform, edge detection, edge detection function
Platform: | Size: 129024 | Author: 李蕊玲 | Hits:

[Fractal programvideoprocessor

Description: 边沿检测,用vhdl实现sobel算子。-Edge detection, using VHDL realize sobel operator.
Platform: | Size: 8093696 | Author: 大洪 | Hits:

[Software EngineeringDigital_Filter_implementation_by_FPGA

Description: 1.an fpga implementation of the image space reconstruction algorithm for hyperspectral imaging analysis 2. fpga implemention of a median filter 3. fpga implementation of digital filters 4.hardware acceleration of edge detection algorithm on fpgas 5.implementation and evaluation of image processing algorithms on reconfigurable architecture using C-based hardware descriptive languages 6. implementing 2D median filter in fpgas 7.视频图像处理与分析的网络资源
Platform: | Size: 1969152 | Author: carol | Hits:

[VHDL-FPGA-Verilogedge

Description: 图像处理中边缘检测的VHDL源代码,所用的算法是garbor变换-Image processing edge detection of VHDL source code, the algorithms used are garbor transform
Platform: | Size: 384000 | Author: 翁文天 | Hits:

[VHDL-FPGA-Verilogedge_check2

Description: 一种实用的上升沿检测程序,可用于上升沿检测,或根据上升沿生成高低电平等-Rising edge of a practical testing procedure can be used for rising edge detection, or generated in accordance with the high-low, such as rising edge
Platform: | Size: 1024 | Author: fang | Hits:

[VHDL-FPGA-Verilogedge_detection

Description: edge detection algorithm in verilog HDL, along with test bench file. compiled in modelsim6.1
Platform: | Size: 34816 | Author: yahyajan | Hits:

[VHDL-FPGA-VerilogTIMEFACEDETECTIONANDLIPFEATUREEXTRACTIONUSINGFPGA

Description: Abstract—This paper proposes a new technique for face detection and lip feature extraction. A real-time field-programmable gate array (FPGA) implementation of the two proposed techniques is also presented. Face detection is based on a naive Bayes classifier that classifies an edge-extracted representation of an image. Using edge representation significantly reduces the model’s size to only 5184 B, which is 2417 times smaller than a comparable statistical modeling technique, while achieving an 86.6 correct detection rate under various lighting conditions. Lip feature extraction uses the contrast around the lip contour to extract the height and width of the mouth, metrics that are useful for speech filtering. The proposed FPGA system occupies only 15 050 logic cells, or about six times less than a current comparable FPGA face detection system.-Abstract—This paper proposes a new technique for face detection and lip feature extraction. A real-time field-programmable gate array (FPGA) implementation of the two proposed techniques is also presented. Face detection is based on a naive Bayes classifier that classifies an edge-extracted representation of an image. Using edge representation significantly reduces the model’s size to only 5184 B, which is 2417 times smaller than a comparable statistical modeling technique, while achieving an 86.6 correct detection rate under various lighting conditions. Lip feature extraction uses the contrast around the lip contour to extract the height and width of the mouth, metrics that are useful for speech filtering. The proposed FPGA system occupies only 15 050 logic cells, or about six times less than a current comparable FPGA face detection system.
Platform: | Size: 28409856 | Author: ramanaidu | Hits:

[Graph programDE2_70_D5M_LTM_black-line

Description: 基于DE2-70的摄像头图像处理程序,主要在边缘检测上增加了视线内黑线判断的功能-Based on the DE2-70 camera image-processing program, mainly in the edge detection increased the black line within the line of sight to determine the function
Platform: | Size: 6322176 | Author: liliang | Hits:

[Mathimatics-Numerical algorithmsedge_detection_morphological

Description: edge detection using morphological way..sober and dilation implementation
Platform: | Size: 36864 | Author: sachin | Hits:

[Mathimatics-Numerical algorithmsedge_detector

Description: image edge detection
Platform: | Size: 3072 | Author: sachin | Hits:

[Mathimatics-Numerical algorithmsedgedetect

Description: image edge detection using vhdl
Platform: | Size: 638976 | Author: sachin | Hits:

[Mathimatics-Numerical algorithmsedgewen

Description: edge detection using vhdl
Platform: | Size: 384000 | Author: sachin | Hits:

[VHDL-FPGA-Verilogsobel

Description: verilog sobel FPGA edge detection-Adopted verilog language realizes sobel edge detection in image processing algorithm
Platform: | Size: 10240 | Author: wkd | Hits:

[VHDL-FPGA-VerilogEdge-detection

Description: 多个边缘检测sobel算子的verilog程序模块。-Multiple edge detection sobel operator verilog program modules
Platform: | Size: 4096 | Author: | Hits:

[VHDL-FPGA-VerilogNew-Microsoft-Office-Word-Document

Description: VHDL EDGE DETECTION SYNOPSIS
Platform: | Size: 251904 | Author: aadi | Hits:

[VHDL-FPGA-VerilogDetection-Algorithm

Description: vhdl for edge détection prewi-vhdl for edge détection prewitt
Platform: | Size: 362496 | Author: ami | Hits:

[VHDL-FPGA-Verilogvhdl-program

Description: sobel edge detection using vhdl
Platform: | Size: 108544 | Author: hamed | Hits:

[VHDL-FPGA-Verilogedge_detect

Description: 采用VHDL语言编写的边缘检测源代码,在xilinx公司的spatan-3an的仿真版上验证无误,供初学者学习-Edge detection using VHDL language source code, verification, simulation version of the company spatan-3an xilinx for beginners to learn
Platform: | Size: 12288 | Author: 纪坤 | Hits:
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