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[Other resource] 经典设计VHDL源代码

Description: 非常好的VHDL小程序。内容齐全。基本的功能都有。-very good VHDL small programs. Content complete. The basic functions have.
Platform: | Size: 44474 | Author: 林玉儿 | Hits:

[Embeded-SCM Develop]  148个verilog hdl小程序（有很多testbench）——

Description: 148个verilog hdl小程序（有很多testbench）——.-148 Verilog HDL small programs (many testbench) from Part
Platform: | Size: 55296 | Author: 地方 | Hits:

[Other] LED_DEMO_64X32

Description: LED 显示 的小程序主要用于获得点阵码串口通信的自己设置-LED display of small programs mainly for access to serial dot matrix codes set up their own communications
Platform: | Size: 14336 | Author: 聪 | Hits:

[VHDL-FPGA-Verilog] wave_sin_fangbo

Description: VHDL小程序（本人的一些小成绩哦，希望对大家有帮助）-VHDL small programs (some of my small achievements Oh, we want to help)
Platform: | Size: 22528 | Author: 张玉龙 | Hits:

[VHDL-FPGA-Verilog] 经典设计VHDL源代码

Description: 非常好的VHDL小程序。内容齐全。基本的功能都有。-very good VHDL small programs. Content complete. The basic functions have.
Platform: | Size: 44032 | Author: 林玉儿 | Hits:

[VHDL-FPGA-Verilog] MVHDL

Description: 本程式為並列flash ROM之控制程式, 可將flash rom的資料讀出後, 經過CPLD controller將圖檔轉成VESA影像訊號, 輸出至螢幕, 本程式已經過硬體驗證-the parallel program for controlling flash ROM programs, rom flash can be read out information, After drawing CPLD controller will turn into VESA video signal and output to screen. The program has strong experience card
Platform: | Size: 4977664 | Author: 明華 | Hits:

[VHDL-FPGA-Verilog] DISPLAY

Description: 用 vhdl 语言编写的1602的小程序-With VHDL 1602 language of the small programs
Platform: | Size: 280576 | Author: zhg | Hits:

[VHDL-FPGA-Verilog] lift_VHDLDocument

Description: 用VHDL描述的电梯运行程序，代码注释很详细，希望对大家有帮助-VHDL description of the elevator used to run programs, code comment in great detail, I hope all of you help
Platform: | Size: 162816 | Author: ninghuiming | Hits:

[VHDL-FPGA-Verilog] 01.ISE8.2

Description: 这个是我用的合众达试验箱里面的资料。合众达试验箱里面集成的是xilinx的virtex4，这个是在ise环境中审计的程序，包括led,da/ad转换实验，键盘实验，以及rtc读取和lcd显示等。-vhdl programs that used by xilinx virtex4
Platform: | Size: 14129152 | Author: 肖姗姗 | Hits:

[VHDL-FPGA-Verilog] PSKcodeconversion

Description: 利用硬件描述语言VHDL实现PSK信号相对码和绝对码的转换-Two VHDL programs to realize the PSK signals conversion between absolute and relative code
Platform: | Size: 1024 | Author: yuanzongliang | Hits:

[VHDL-FPGA-Verilog] epcs_controller

Description: 用verilog 语言写的可配置控制器程序用于实现fpga软件程序的存储-Verilog language used to write programs that can configure the controller fpga software programs used to implement the storage
Platform: | Size: 3072 | Author: tianyu | Hits:

[VHDL-FPGA-Verilog] UART

Description: 包含一个在QUARYUS环境下运行的UART的工程，实际在EP2C20Q240上调试成功的通用串口VHDL程序-The QUARYUS environment contains a UART to run the project, the actual success of the EP2C20Q240 Universal Serial debugging VHDL programs
Platform: | Size: 2151424 | Author: 王果 | Hits:

[Software Engineering] 13105886-vhdl-lab-programs

Description: vhdl programme on lfsr
Platform: | Size: 289792 | Author: rahul | Hits:

[Other Embeded program] vhdl

Description: there is Design a butterworth low pass IIR filter. (a) Using butterworth to design an IIR low pass filter with Fs=8192hz and Fpass =1000 and Fstop =1200. You use the minimum order of filter. And match exactly at pass band. and other programs
Platform: | Size: 2048 | Author: fathima | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: （1）用VHDL语言编写程序，在EDA实验板上实现 （2）能正常计时。显示模式分为两种，即24小时制和12小时制。其中12小时制须显示上，下午（用指示灯显示）。时，分，秒都要显示。 （3）. 手动校准电路。用一个功能选择按钮选择较时，分功能，用另一个按钮调校对应的时和分的数值。 用VHDL语言编写程序，在EDA实验板上实现 （4） 整点报时。 （5）. 闹钟功能。 （6）．秒表功能。-(1) using VHDL language program, in the EDA experiments on-board implementation (2) to resume normal time. Display mode is divided into two kinds, namely, a 24-hour system and 12-hour clock. Including 12-hour clock to be displayed on the afternoon (with light display). Hours, minutes and seconds to be displayed. (3). Manual calibration circuit. With a select button to choose a more functional hours, minutes functions, with another button to adjust the corresponding time and sub-values. Using VHDL language programs, in the EDA experiments on-board implementation (4) The whole point timekeeping. (5). Alarm. (6). Stopwatch function.
Platform: | Size: 4096 | Author: malon | Hits:

[VHDL-FPGA-Verilog] vhdl-programs

Description: this file contain some general vhdl programs .
Platform: | Size: 12288 | Author: rasmi | Hits:

[Software Engineering] VHDL

Description: VHDL PROGRAMS ON FRENCH LANGAGE
Platform: | Size: 1796096 | Author: othman | Hits:

[VHDL-FPGA-Verilog] vhdl-programs

Description: vhdl source codes for various digital systems
Platform: | Size: 7168 | Author: princemathew | Hits:

[Other] 82575535-A-VHDL-Primer-by-J-Bhaskar

Description: BASIC OF VHDL .YOU WILL BE ABLE TO SOLVE THE BASIC VHDL PROGRAMS
Platform: | Size: 1119232 | Author: atul | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: vhdl program vhdl programs with result device summary
Platform: | Size: 96256 | Author: Hemant Kumar | Hits:
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